dp83901a National Semiconductor Corporation, dp83901a Datasheet - Page 4

• Manufacturer Part Number: dp83901a
• Description: Serial Network Interface Controller
• Manufacturer: National Semiconductor Corporation

BUS INTERFACE PINS (Continued)
NETWORK INTERFACE PINS
Pin No
Pin Description
42
60
62
39
40
41
65
67
68
43
46
47
50
51
56
61
63
PRQ ADS1
BACK
BREQ
RESET
INT
WACK
TX
TX
TEST
SEL
X1
GND X2
SNISEL
RX
RX
CD
CD
Pin Name
b
a
b
a
b
a
O Z
I O
O
O
O
O
I
I
I
I
I
I
I
I
I
(Continued)
PORT REQUEST ADDRESS STROBE 1
Note This line will power up as TRI-STATE until the Data Configuration Register is programmed
BUS ACKNOWLEDGE Bus Acknowledge is an active high signal indicating that the CPU has
granted the bus to the SNIC If immediate bus access is desired BREQ should be tied to BACK
Tying BACK to V
BUS REQUEST Bus Request is an active high signal used to request the bus for DMA transfers
This signal is automatically generated when the FIFO needs servicing
RESET Reset is active low and places the SNIC in a reset immediately no packets are
transmitted or received by the SNIC until STA bit is set Affects Command Register Interrupt
Mask Register Data Configuration Register and Transmit Configuration Register The SNIC will
execute reset within 10 BSCK cycles and TXC cycles
INTERRUPT Indicates that the SNIC requires CPU attention after reception transmission or
completion of DMA transfers The interrupt is cleared by writing to the ISR (Interrupt Service
Register) All interrupts are maskable
WRITE ACKNOWLEDGE Issued from system to SNIC to indicate that data has been written to
the external latch The SNIC will begin a write cycle to place the data in local memory
TRANSMIT OUTPUT Differential driver which sends the encoded data to the transceiver The
outputs are source followers which require 270X pulldown resistors
FACTORY TEST INPUT Used to check the chip’s internal functions Tied low during normal
operation
MODE SELECT When high Transmit
When low Transmit
primary
EXTERNAL OSCILLATOR INPUT
GROUND X2 This in should normally be connected to ground It is possible to use a crystal
oscillator using X1 and GND X2 if certain precautions are taken Contact National
Semiconductor for more information
FACTORY TEST INPUT For normal operation tied to V
module to be tested independently of the SNIC module
RECEIVE INPUT Differential receive input pair from the transceiver
COLLISION INPUT Differential collision pair input from the transceiver


32-BIT MODE If LAS is set in the Data Configuration Register this line is programmed
as ADS1 It is used to strobe addresses A16 – A31 into external latches (A16 – A31 are the
fixed addresses stored in RSAR0 RSAR1) ADS1 will remain at TRI-STATE until BACK is
received
16-BIT MODE If LAS is not set in the Data Configuration Register this line is programmed as
PRQ and is used for Remote DMA Transfers The SNIC initiates a single remote DMA read or
write operation by asserting this pin In this mode PRQ will be a standard logic output
CC
a
will result in a deadlock
is positive with respect to Transmit
4
a
and Transmit
Description
b
CC
are the same voltage in the idle state
b
When low enables the ENDEC
in the idle state at the transformer’s