mc68hc708mp16 Freescale Semiconductor, Inc, mc68hc708mp16 Datasheet - Page 124

• Manufacturer Part Number: mc68hc708mp16
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Clock Generator Module (CGM)
8.9 CGM During Break Mode
8.10 Acquisition/Lock Time Specifications
8.10.1 Acquisition/Lock Time Definitions
Technical Data
124
The system integration module (SIM) controls whether status bits in
other modules can be cleared during the break state. The BCFE bit in
the SIM break flag control register (SBFCR) enables software to clear
status bits during the break state. (See
Register.)
To allow software to clear status bits during a break interrupt, write a
logic 1 to the BCFE bit. If a status bit is cleared during the break state, it
remains cleared when the MCU exits the break state.
To protect the PLLF bit during the break state, write a logic 0 to the BCFE
bit. With BCFE at logic 0 (its default state), software can read and write
the PLL control register during the break state without affecting the PLLF
bit.
The acquisition and lock times of the PLL are, in many applications, the
most critical PLL design parameters. Proper design and use of the PLL
ensures the highest stability and lowest acquisition/lock times.
Typical control systems refer to the acquisition time or lock time as the
reaction time, within specified tolerances, of the system to a step input.
In a PLL, the step input occurs when the PLL is turned on or when it
suffers a noise hit. The tolerance is usually specified as a percent of the
step input or when the output settles to the desired value plus or minus
a percent of the frequency change. Therefore, the reaction time is
constant in this definition, regardless of the size of the step input. For
example, consider a system with a 5% acquisition time tolerance. If a
command instructs the system to change from 0 Hz to 1 MHz, the
acquisition time is the time taken for the frequency to reach
1 MHz ±50 kHz. Fifty kHz = 5% of the 1-MHz step input. If the system is
operating at 1 MHz and suffers a –100-kHz noise hit, the acquisition time
Clock Generator Module (CGM)
7.7.4 SIM Break Flag Control
MC68HC708MP16
Freescale Semiconductor
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Rev. 3.1