mc68hc05pv8 Freescale Semiconductor, Inc, mc68hc05pv8 Datasheet - Page 75

• Manufacturer Part Number: mc68hc05pv8
• Description: Hcmos Microcontroller Unit
• Manufacturer: Freescale Semiconductor, Inc

4.10.3 Power Driver Short Circuit Interrupt
4.11 Keyboard Interrupts
4.12 Port C Contact Sense Interrupt
MC68HC(8)05PV8/A — Rev. 1.9
LVIE – Low Voltage Interrupt Enable
There are two different interrupt flags that cause a power driver short
circuit interrupt whenever they are set and enabled. The interrupt flags
are located in the port C status register, and the enable bits are located
in the port C configuration register 1. Any of these interrupts vector to the
same interrupt service routine, located at the address specified by the
contents of memory location $3FF4 and $3FF5.
For details see
When configured as input pins, PA0–7 provide a wired-OR keyboard
interrupt facility and generate an interrupt provided the interrupt enable
bits (PALIE or PAHIE) in the port A configuration register are set.
The interrupt vector for this interrupt is located at $3FF2 and $3FF3.
Further information on the keyboard interrupt facility can be found in
Port
There is an interrupt flag that causes a contact sense interrupt whenever
it is set and enabled. This interrupt flag is a wired-OR of the active
contact sense inputs. The interrupt flag is located in the port C status
register, and the enable bit is located in the port C configuration register
1. This interrupt vectors to the memory location $3FF0 and $3FF1.
Whenever a PCxCS bit is set, but the corresponding pin is not configured
This bit enables/disables the low voltage interrupt. Once this interrupt
is acknowledged, the enable bit should be cleared and the low voltage
interrupt flag should be monitored until the bit is cleared.
Freescale Semiconductor, Inc.
For More Information On This Product,
A.
1 = Low voltage interrupt enabled
0 = Low voltage interrupt disabled
Go to: www.freescale.com
7.6 Port C (High Voltage
Interrupts
Port).
Keyboard Interrupts
Technical Data
Interrupts
7.4