mc68hc05pv8 Freescale Semiconductor, Inc, mc68hc05pv8 Datasheet - Page 122
mc68hc05pv8
Manufacturer Part Number
mc68hc05pv8
Description
Hcmos Microcontroller Unit
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC68HC05PV8.pdf
(196 pages)
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T echnical Data
8.4 Core Timer During WAIT
8.5 Core Timer During ST OP
Technical Data
The power-on cycle clears the entire counter chain and begins clocking
the counter. After 4064 cycles, the power-on reset circuit is released
which again clears the counter chain and allows the device to come out
of reset. At this point, if RESET is not asserted, the timer will start
counting up from zero and normal device operation will begin. When
RESET is asserted anytime during operation (other than POR), the
counter chain will be cleared.
The CPU clock halts during the WAIT mode but the core timer remains
active. If the CTIMER interrupts are enabled, then a CTIMER interrupt
will cause the processor to exit the WAIT mode.
The timer and the interrupt mask and enable flags are cleared when
going into STOP mode. When STOP is exited by an external interrupt or
an external reset the internal oscillator will restart, followed by an internal
processor stabilization delay (t
operation resumes.
Freescale Semiconductor, Inc.
For More Information On This Product,
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Core Timer
PORL
). The timer is then cleared and the
MC68HC(8)05PV8/A — Rev. 1.9
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