mc68hc05p18a Freescale Semiconductor, Inc, mc68hc05p18a Datasheet - Page 77

• Manufacturer Part Number: mc68hc05p18a
• Description: Mc68hc05p18a Hcmos Microcontroller Unit
• Manufacturer: Freescale Semiconductor, Inc

Technical Data — MC68HC05P18A
9.1 Contents
9.2 Introduction
MC68HC05P18A
9.2
9.3
9.3.1
9.3.2
9.3.3
9.4
9.4.1
9.4.2
9.4.3
The simple synchronous serial input/output (I/O) port (SIOP) subsystem
is designed to provide efficient serial communications between
peripheral devices or other MCUs. The SIOP is implemented as a 3-wire
master/slave system with:
A block diagram of the SIOP is shown in
The SIOP subsystem shares its input/output pins with port B. When the
SIOP is enabled, SPE bit set in the SIOP control register (SCR), port B
data direction register (DDR), and data register are modified by the
SIOP. Although port B DDR and data registers can be altered by
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Freescale Semiconductor, Inc.
Section 9. Serial Input/Output Ports (SIOP)
For More Information On This Product,
Serial clock (SCK)
Serial data input (SDI)
Serial data output (SDO)
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .77
SIOP Signal Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .78
SIOP Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .80
Serial Clock (SCK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .78
Serial Data Input (SDI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .79
Serial Data Output (SDO). . . . . . . . . . . . . . . . . . . . . . . . . . .79
SIOP Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . .80
SIOP Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .82
SIOP Data Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .83
Serial Input/Output Ports (SIOP)
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Figure
9-1.
Technical Data