mc68hc908ap8a Freescale Semiconductor, Inc, mc68hc908ap8a Datasheet - Page 291

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mc68hc908ap8a

Manufacturer Part Number
mc68hc908ap8a
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
21.3.3 TIMI and TIM2 During Break Interrupts
A break interrupt stops the timer counters.
21.3.4 COP During Break Interrupts
The COP is disabled during a break interrupt when V
21.4 Low-Power Modes
The WAIT and STOP instructions put the MCU in low power-consumption standby modes.
21.4.1 Wait Mode
If enabled, the break module is active in wait mode. In the break routine, the user can subtract one from
the return address on the stack if SBSW is set. (see
the BW bit by writing logic 0 to it.
21.5 Break Module Registers
These registers control and monitor operation of the break module:
21.5.1 Break Status and Control Register
The break status and control register (BRKSCR) contains break module enable and status bits.
Freescale Semiconductor
Break status and control register (BRKSCR)
Break address register high (BRKH)
Break address register low (BRKL)
SIM break status register (SBSR)
SIM break flag control register (SBFCR)
Address:
A break address should be placed at the address of the instruction opcode.
When software does not change the break address and clears the BRKA
bit in the first break interrupt routine, the next break interrupt will not be
generated after exiting the interrupt routine even when the internal address
bus matches the value written in the break address registers.
Reset:
Read:
Write:
Figure 21-3. Break Status and Control Register (BRKSCR)
$FE0E
BRKE
Bit 7
0
= Unimplemented
BRKA
MC68HC908AP A-Family Data Sheet, Rev. 3
6
0
5
0
0
CAUTION
4
0
0
Chapter 7 System Integration Module
TST
is present on the RST pin.
3
0
0
2
0
0
1
0
0
Bit 0
0
0
Low-Power Modes
(SIM)) Clear
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