mc68hc908ap8a Freescale Semiconductor, Inc, mc68hc908ap8a Datasheet - Page 141

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mc68hc908ap8a

Manufacturer Part Number
mc68hc908ap8a
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
9.9.2 TIM Counter Registers
The two read-only TIM counter registers contain the high and low bytes of the value in the TIM counter.
Reading the high byte (TCNTH) latches the contents of the low byte (TCNTL) into a buffer. Subsequent
reads of TCNTH do not affect the latched TCNTL value until TCNTL is read. Reset clears the TIM counter
registers. Setting the TIM reset bit (TRST) also clears the TIM counter registers.
9.9.3 TIM Counter Modulo Registers
The read/write TIM modulo registers contain the modulo value for the TIM counter. When the TIM counter
reaches the modulo value, the overflow flag (TOF) becomes set, and the TIM counter resumes counting
from $0000 at the next timer clock. Writing to the high byte (TMODH) inhibits the TOF bit and overflow
interrupts until the low byte (TMODL) is written. Reset sets the TIM counter modulo registers.
Freescale Semiconductor
Address: T1CNTL, $0022 and T2CNTL, $002D
Address: T1CNTH, $0021 and T2CNTH, $002C
If you read TCNTH during a break interrupt, be sure to unlatch TCNTL by
reading TCNTL before exiting the break interrupt. Otherwise, TCNTL
retains the value latched during the break.
Reset:
Reset:
Read:
Read:
Write:
Write:
PS2
0
0
0
0
1
1
1
1
Bit 15
Bit 7
Bit 7
Bit 7
0
0
Figure 9-5. TIM Counter Registers High (TCNTH)
Figure 9-6. TIM Counter Registers Low (TCNTL)
PS1
0
0
1
1
0
0
1
1
MC68HC908AP A-Family Data Sheet, Rev. 3
14
6
0
6
6
0
Table 9-2. Prescaler Selection
PS0
0
1
0
1
0
1
0
1
13
5
0
5
5
0
NOTE
12
4
0
4
4
0
Internal bus clock ÷ 1
Internal bus clock ÷ 2
Internal bus clock ÷ 4
Internal bus clock ÷ 8
Internal bus clock ÷ 16
Internal bus clock ÷ 32
Internal bus clock ÷ 64
11
3
0
3
3
0
TIM Clock Source
Not available
10
2
0
2
2
0
1
9
0
1
1
0
Bit 0
Bit 8
Bit 0
Bit 0
0
0
I/O Registers
141

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