mc68hc908gr8b Freescale Semiconductor, Inc, mc68hc908gr8b Datasheet - Page 159

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mc68hc908gr8b

Manufacturer Part Number
mc68hc908gr8b
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
14.3.2.1 Power-On Reset
When power is first applied to the MCU, the power-on reset module (POR) generates a pulse to indicate
that power-on has occurred. The external reset pin (RST) is held low while the SIM counter counts out
4096 + 32 CGMXCLK cycles. Thirty-two CGMXCLK cycles later, the CPU and memories are released
from reset to allow the reset vector sequence to occur.
At power-on, these events occur:
Freescale Semiconductor
A POR pulse is generated.
The internal reset signal is asserted.
The SIM enables CGMOUT.
Internal clocks to the CPU and modules are held inactive for 4096 CGMXCLK cycles to allow
stabilization of the oscillator.
The RST pin is driven low during the oscillator stabilization time.
The POR bit of the SIM reset status register (SRSR) is set and all other bits in the register are
cleared.
CGMXCLK
IRST
RST
IAB
Reset Recovery Type
All others
POR/LVI
Figure 14-6. Sources of Internal Reset
RST PULLED LOW BY MCU
ILLEGAL ADDRESS RST
ILLEGAL OPCODE RST
Figure 14-5. Internal Reset Timing
Table 14-2. Reset Recovery Type
MC68HC908GR8B Data Sheet, Rev. 3.0
32 CYCLES
MODRST
COPRST
POR
LVI
Actual Number of Cycles
4163 (4096 + 64 + 3)
INTERNAL RESET
32 CYCLES
67 (64 + 3)
VECTOR HIGH
Reset and System Initialization
159

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