z86e54 ZiLOG Semiconductor, z86e54 Datasheet - Page 28

• Manufacturer Part Number: z86e54
• Description: Z8 512 Byte Otp Mcu
• Manufacturer: ZiLOG Semiconductor

STANDARD Mode
PS020102-1003
Pin Function Changes in EPROM Mode
Application Precaution
Note:
Clear (active High). This pin resets the internal address counter at the High level.
Clock Address Clock. This pin is a clock input. The internal address counter
increases by one count with one clock cycle.
PGM Program Mode (active Low). A Low level at this pin programs the data to
the EPROM through the data bus.
With the exception of V
EPROM mode. X
OE, P32 functions as EPM, P33 functions as V
functions as CLOCK, and P02 functions as PGM. Please refer to Program Mem-
ory for additional EPROM mode descriptions.
The production test-mode environment may be enabled accidentally during nor-
mal operation if excessive noise surges above V
In addition, processor operation of Z8
noise surges on the P33 (V
microcontroller is in Standard Mode.
Recommendations for dampening voltage surges in both test and OTP mode
include the following:
•
•
XTAL1, XTAL2. Crystal In, Crystal Out (time-based input and output, respec-
tively). These pins connect an external parallel-resonant crystal, resonator, RC,
LC, or an external single-phase clock (8 MHz max) to the on-chip clock oscillator
and buffer.
Port 0, P02–P00. Port 0 is a 3-bit bidirectional, Schmitt-triggered CMOS-compati-
ble I/O port. These three I/O lines can be globally configured under software con-
trol to be inputs or outputs (Figure 9).
Using a clamping diode to V
Adding a capacitor to the affected pin.
Programming the EPROM/Test Mode Disable option prevents
accidental entry into EPROM Mode or Test Mode.
OUT
offers no function; X
CC
and GND, the Z8
PP
), XTAL1 (CE), P32 (EPM), P31 (OE) pins while the
CC
.
®
OTP devices maybe affected by excessive
IN
®
functions as OE, P31 functions as
changes all of its pin functions in
PP
CC
P00 functions as CLEAR, P01
occur on the XTAL1 pin (OE).
Z8
®
512 Byte OTP MCU
Z86E54
22