ml67q5200 ETC-unknow, ml67q5200 Datasheet - Page 16

• Manufacturer Part Number: ml67q5200
• Description: Digital Audio Controller
• Manufacturer: ETC-unknow

ML675200/ML67Q5200
External I/O Bus Read Cycle
(V
1.
16
IOCS_N setup time
IOCS_N output hold time 1
XA[19:1] setup time
XA[19:1] hold time 1
XBS_N[1:0] setup time
XBS_N[1:0] hold time 1
XOE_N output delay time
XOE_N pulse width
XD[15:0] input setup time
XD[15:0] input hold time
DD_CORE
n
Address setup time and XOE_N/XWE_N pulse width are parameters that can be set by the IOAC register.
0
• Oki Semiconductor
= address setup time, n
= 1.65 V to 1.95 V, V
Parameter
1
XBS_N[1:0]/PIOC[9:8]
= XOE_N/XWE_N pulse width, Tc = HCLK cycle
XD[15:0]/PIOA[15:0]
XA[19:1]/PIOC[2:0]
IOCS_N/PIOC[5]
XOE_N/PIOC[6]
PIOB[15:0]
DD_IO
= 2.7 V to 3.6 V, T
[1]
t
t
t
t
t
t
t
t
t
t
XIOCS
XIOCSH1
XIOAS
XIOAH1
XIOBS
XIOBH1
XIOOED
XIOOEW
XIODIS
XIODIH
Symbol
Figure 6. External I/O Bus Read Cycle Timing
t
A
XIOOED
= –30°C to +70°C)
Condition
CL = 50 pF
t
t
t
XIOCS
XIOAS
XIOBS
t
XIOOEW
t
XIODIS
(n
(n
(n
0
0
0
n
n
+n
+n
+n
0
1
Tc - 10
Tc - 10
Min
1
1
1
40
Tc
-5
-5
0
)Tc - 10
)Tc - 10
)Tc - 10
t
t
XIOCSH1
t
XIOBH1
XIODIH
t
XIOAH1
Typ
—
—
—
—
—
—
—
—
—
—
Max
—
—
—
—
—
—
—
—
—
—
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns