ade7166 Analog Devices, Inc., ade7166 Datasheet - Page 129

• Manufacturer Part Number: ade7166
• Description: Single-phase Energy Measurement Ic With 8052 Mcu, Rtc, And Lcd Driver
• Manufacturer: Analog Devices, Inc.

Table 140. SPI Configuration SFR 1 (SPIMOD1, 0xE8)
Bit
7 to 6
5
4
3
2
1 to 0
Address
0xEF to
0xEE
0xED
0xEC
0xEB
0xEA
0xE9 to
0xE8
Mnemonic
Reserved
INTMOD
AUTO_SS
SS_EN
RxOFW
SPIR[1:0]
Default
0
0
1
0
0
0
Description
Reserved.
SPI Interrupt Mode.
INTMOD
0
1
Master Mode, SS Output Control (see Figure 108).
AUTO_SS
0
1
Slave Mode, SS Input Enable.
When this bit is set to Logic 1, the SS pin is defined as the slave select input pin for the SPI
slave interface.
Receive Buffer Overflow Write Enable.
RxOFW
0
1
Master Mode, SPI SCLK Frequency.
SPIR[1:0]
00
01
10
11
Rev. A | Page 129 of 144
Result
SPI interrupt is set when SPI Rx buffer is full.
SPI interrupt is set when SPI Tx buffer is empty.
Result
The SS pin is held low while this bit is cleared. This allows manual chip select
control using the SS pin.
Single Byte Read or Write. The SS pin goes low during a single byte
transmission and then returns high.
Continuous Transfer. The SS pin goes low during the duration of the multibyte
continuous transfer and then returns high.
Result
If the SPI2CRx SFR has not been read when a new data byte is received,
the new byte is discarded.
If the SPI2CRx SFR has not been read when a new data byte is received,
the new byte overwrites the old data.
Result
f
f
f
f
CORE
CORE
CORE
CORE
/8 = 512 kHz (if f
/16 = 256 kHz (if f
/32 = 128 kHz (if f
/64 = 64 kHz (if f
ADE7566/ADE7569/ADE7166/ADE7169
CORE
CORE
CORE
CORE
= 4.096 MHz)
= 4.096 MHz)
= 4.096 MHz)
= 4.096 MHz)