cy8c26233-24sxit Cypress Semiconductor Corporation., cy8c26233-24sxit Datasheet - Page 58

• Manufacturer Part Number: cy8c26233-24sxit
• Description: 8-bit Programmable System-on-chip Psoc? Microcontrollers
• Manufacturer: Cypress Semiconductor Corporation.

9.3.5
Table 57:
Digital Communications Type A 04 Control Register 0
Digital Communications Type A 05 Control Register 0
Digital Communications Type A Block 06 Control Register 0
Digital Communications Type A Block 07 Control Register 0
58
Bit 7 : Parity Error
0 = Indicates no parity error detected in the last byte received
1 = Indicates a parity error detected in the last byte received
Reset when this register is read
Bit 6 : Overrun
0 = Indicates that no overrun has taken place
1 = Indicates the RX Data register was overwritten with a new byte before the previous one had been read
Reset when this register is read
Bit 5 : Framing Error
0 = Indicates correct stop bit
1 = Indicates a missing STOP bit
Reset when this register is read
Bit 4 : RX Active
0 = Indicates no communication currently in progress
1 = Indicates a start bit has been received and a byte is currently being received
Bit 3 : RX Reg Full
0 = Indicates the RX Data register is empty
1 = Indicates a byte has been loaded into the RX Data register
Interrupt source for RXUART. Reset when the RX Data register is read (Data Register 2)
Bit 2 : Parity Type
0 = Even
1 = Odd
Bit 1 : Parity Enable
0 = Parity Disabled
1 = Parity Enabled
Bit 0 : Enable
0 = Function Disabled
1 = Function Enabled
Read/Write
Bit Name
Bit #
POR
Digital Communications Type A Block xx Control Register 0 When Used as UART
Receiver
Digital Communications Type A Block xx Control Register 0...
Parity
Error
R
7
0
Overrun
Cypress MicroSystems CY8C25122/CY8C26233/CY8C26443/CY8C26643 Family Data Sheet
R
6
0
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
Framing
Error
R
5
0
RX Active
R
4
0
(DCA04CR0, Address = Bank 0, 33h)
(DCA05CR0, Address = Bank 0, 37h)
(DCA06CR0, Address = Bank 0, 3Bh)
(DCA07CR0, Address = Bank 0, 3Fh)
RX Reg
Full
R
3
0
Parity
Type
RW
2
0
Enable
Parity
RW
1
0
September 5, 2002
Enable
RW
0
0