xa3s1400a-4ftg256q Xilinx Corp., xa3s1400a-4ftg256q Datasheet - Page 51

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xa3s1400a-4ftg256q

Manufacturer Part Number
xa3s1400a-4ftg256q
Description
Xa Spartan-3a Automotive Fpga Family Data Sheet
Manufacturer
Xilinx Corp.
Datasheet
Table 52: Configuration Timing Requirements for Attached SPI Serial Flash
DS681 (v1.1) February 3, 2009
Product Specification
Notes:
1.
2.
T
T
T
T
f
C
CCS
DSU
DH
V
Symbol
or f
These requirements are for successful FPGA configuration in SPI mode, where the FPGA generates the CCLK signal. The
post-configuration timing can be different to support the specific needs of the application loaded into the FPGA.
Subtract additional printed circuit board routing delay as required by the application.
R
R
SPI serial Flash PROM chip-select time
SPI serial Flash PROM data input setup time
SPI serial Flash PROM data input hold time
SPI serial Flash PROM data clock-to-output time
Maximum SPI serial Flash PROM clock frequency (also depends on
specific read command used)
Description
www.xilinx.com
T
T
T
CCS
DSU
V
T
f
C
DH
T
Requirement
MCCLn
-------------------------------- -
T
T
T
CCLKn min
MCCL1
MCCL1
T
MCCH1
1
(
T
DCC
T
T
)
CCO
CCO
Units
MHz
ns
ns
ns
ns
51

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