adsp-21020 Analog Devices, Inc., adsp-21020 Datasheet - Page 9

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adsp-21020

Manufacturer Part Number
adsp-21020
Description
32/40-bit Ieee Floating-point Dsp Microprocessor
Manufacturer
Analog Devices, Inc.
Datasheet

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REV. C
Name
Register File
R15–R0
Program Sequencer
PC*
PCSTK
PCSTKP
FADDR*
DADDR*
LADDR
CURLCNTR
LCNTR
Data Address Generators
I7–I0
M7–M0
L7–L0
B7–B0
I15–I8
M15–M8
L15–L8
B15–B8
Bus Exchange
PX1
PX2
PX
Timer
TPERIOD
TCOUNT
Memory Interface
DMWAIT
DMBANK1
DMBANK2
DMBANK3
DMADR*
PMWAIT
PMBANK1
PMADR*
System Registers
MODE1
MODE2
IRPTL
IMASK
IMASKP
ASTAT
STKY
USTAT1
USTAT2
*read-only
Refer to User’s Manual for bit-level definitions of each register.
Register file locations
Program counter; address of instruction cur-
Top of PC stack
PC stack pointer
Fetch address
Decode address
Loop termination address, code; top of loop
Current loop counter; top of loop count stack
Loop count for next nested counter-controlled
DAG1 index registers
DAG1 modify registers
DAG1 length registers
DAG1 base registers
DAG2 index registers
DAG2 modify registers
DAG2 length registers
DAG2 base registers
48-bit PX1 and PX2 combination
Timer period
Timer counter
Wait state and page size control for data
Data memory bank 1 upper boundary
Data memory bank 2 upper boundary
Data memory bank 3 upper boundary
Copy of last data memory address
Wait state and page size control for program
Program memory bank 1 upper boundary
Copy of last program memory address
Mode control bits for bit-reverse, alternate reg-
Mode control bits for interrupt sensitivity,
Interrupt latch
Interrupt mask
Interrupt mask pointer (for nesting)
Arithmetic status flags, bit test, I/O flag values,
Sticky arithmetic status flags, circular buffer
User status register l
User status register 2
Function
rently executing
address stack
loop
PMD-DMD bus exchange 1 (16 bits)
PMD-DMD bus exchange 2 (32 bits)
memory
memory
isters, interrupt nesting and enable, ALU satu-
ration, floating-point rounding mode and
boundary
cache disable and freeze, timer enable, and I/O
flag configuration
and compare accumulator
overflow flags, stack status flags (not sticky)
Table III. Universal Registers
–9–
Fixed-Point
Rn = Rx + Ry
Rn = Rx – Ry
Rn = Rx + Ry, Rm = Rx – Ry
Rn = Rx + Ry + CI
Rn = Rx – Ry + CI – l
Rn = (Rx + Ry)/2
COMP(Rx, Ry)
Rn = –Rx
Rn = ABS Rx
Rn = PASS Rx
Rn = MIN(Rx, Ry)
Rn = MAX(Rx, Ry)
Rn = CLIP Rx BY Ry
Rn = Rx + CI
Rn = Rx + CI – 1
Rn = Rx + l
Rn = Rx – l
Rn = Rx AND Ry
Rn = Rx OR Ry
Rn = Rx XOR Ry
Rn = NOT Rx
Rn, Rx, Ry R15–R0; register file location, fixed-point
Fn, Fx, Fy F15–F0; register file location, floating point
Table IV. ALU Compute Operations
Floating-Point
Fn = Fx + Fy
Fn = Fx – Fy
Fn = Fx + Fy, Fm = Fx – Fy
Fn = ABS (Fx + Fy)
Fn = ABS (Fx – Fy)
Fn = (Fx + Fy)/2
COMP(Fx, Fy)
Fn = –Fx
Fn = ABS Fx
Fn = PASS Fx
Fn = MIN(Fx, Fy)
Fn = MAX(Fx, Fy)
Fn = CLIP Fx BY Fy
Fn = RND Fx
Fn = SCALB Fx BY Ry
Rn = MANT Fx
Rn = LOGB Fx
Rn = FIX Fx BY Ry
Rn = FIX Fx
Fn = FLOAT Rx BY Ry
Fn = FLOAT Rx
Fn = RECIPS Fx
Fn = RSQRTS Fx
Fn = Fx COPYSIGN Fy
ADSP-21020

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