xcr3320 Xilinx Corp., xcr3320 Datasheet - Page 7

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xcr3320

Manufacturer Part Number
xcr3320
Description
Xcr3320 320 Macrocell Sram Cpld
Manufacturer
Xilinx Corp.
Datasheet

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This product has been discontinued. Please see
XCR3320: 320 Macrocell SRAM CPLD
TotalCMOS Design Technique for Fast Zero
Power
Xilinx is the first to offer a TotalCMOS CPLD, both in pro-
cess technology and design technique. Xilinx employs a
cascade of CMOS gates to implement its product terms
instead of the traditional sense amp approach. This CMOS
gate implementation allows Xilinx to offer CPLDs which are
Figure 6: I
Table 1: I
7
Frequency (MHz)
Typical I
CC
CC
CC
vs. Frequency (V
(mA)
vs. Frequency at V
(mA)
I
CC
200
180
160
140
120
100
80
60
40
20
0
0
0.01
0
CC
= 3.3V, 25°C)
CC
20
= 3.3V, 25 C
1.3
1
www.xilinx.com/partinfo/notify/pdn0007.htm
40
www.xilinx.com
20
26
1-800-255-7778
FREQUENCY (MHz)
60
both high performance and low power, breaking the para-
digm that to have low power, you must have low perfor-
mance. This also makes it possible to manufacture high
density CPLDs like the XCR3320 that consume a fraction
of the power of competing devices. Refer to
Table 1
TotalCMOS CPLD (data taken with 20 16-bit counters at
3.3V, 25 C, output buffers disabled).
40
51
showing the I
80
60
77
CC
for details.
100
102
vs. Frequency of the XCR3320
80
DS033 (v1.3) October 9, 2000
SP00657
100
126
120
Figure 6
120
152
and
R

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