epm3064a Altera Corporation, epm3064a Datasheet - Page 6

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epm3064a

Manufacturer Part Number
epm3064a
Description
Programmable Logic Device Family
Manufacturer
Altera Corporation
Datasheet

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MAX 3000A Programmable Logic Device Family Data Sheet
Figure 2. MAX 3000A Macrocell
6
36 Signals
from PIA
LAB Local Array
Product Terms
16 Expander
Macrocells
MAX 3000A macrocells can be individually configured for either
sequential or combinatorial logic operation. Macrocells consist of three
functional blocks: logic array, product–term select matrix, and
programmable register.
Combinatorial logic is implemented in the logic array, which provides
five product terms per macrocell. The product–term select matrix
allocates these product terms for use as either primary logic inputs (to the
OR and XOR gates) to implement combinatorial functions, or as secondary
inputs to the macrocell’s register preset, clock, and clock enable control
functions.
Two kinds of expander product terms (“expanders”) are available to
supplement macrocell logic resources:
The Altera development system automatically optimizes product–term
allocation according to the logic requirements of the design.
Shareable expanders, which are inverted product terms that are fed
back into the logic array
Parallel expanders, which are product terms borrowed from adjacent
macrocells
Product-
Select
Matrix
Term
Shared Logic
Expanders
Parallel Logic
Expanders
(from other
macrocells)
Figure 2
Global
Clear
Select
Clear
shows a MAX 3000A macrocell.
Clocks
2
Global
VCC
Enable
Clock/
Select
D/T
ENA
CLRN
PRN
To PIA
Q
Programmable
Register
Register
Altera Corporation
Bypass
To I/O
Control
Block

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