x79002 Intersil Corporation, x79002 Datasheet - Page 8

• Manufacturer Part Number: x79002
• Description: Nv Dac With Selectable Output Range And Memory
• Manufacturer: Intersil Corporation

SPI INPUT TIMING
SPI INTERFACE TEST CONDITIONS
SERIAL INPUT TIMING
Notes: 1. These parameters are periodically sampled and not 100% tested.
Symbol
Input Pulse Levels
Input Rise and Fall times, between 10% and 90%
Input and Output Timing Threshold Level
External Load at pin SO
t
t
t
WC
t
f
t
t
LEAD
RI
FI
t
CYC
t
t
t
SCK
LAG
WH
WL
SU
t
CS
SCK
H
(1)
(1)
SO
CS
(2)
2. t
SI
cycle. It is the minimum cycle time to be allowed for any non-volatile write cycle by the user, unless the “WIP” bit is used to check for the
end of the write cycle.
WC
Clock Frequency
Cycle Time
Clock HIGH Time
Clock LOW Time
CS Lead Time
CS Lag Time
Data Setup Time
Data Hold Time
Input Rise Time
Input Fall Time
CS Deselect Time
Non-volatile Write Cycle Time
is the time from the rising edge of CS after a valid nonvolatile write sequence, to the end of the self-timed internal non-volatile write
t
SU
High Impedance
MSB
8
t
LEAD
Parameter
t
H
t
WL
X79000, X79001, X79002
t
CYC
10% to 90% of Vcc
10ns
1.4V
2.6k: to Vcc, 3.03k: to Vss, and 10pF to Vss
t
WH
...
...
Min.
200
100
100
100
80
80
20
20
t
FI
LSB
Max.
t
RI
20
20
10
5
t
CS
t
LAG
Unit
MHz
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
March 17, 2005
FN8147.0