dac16fs Analog Devices, Inc., dac16fs Datasheet - Page 11

• Manufacturer Part Number: dac16fs
• Description: 16-bit High Speed Current-output Dac
• Manufacturer: Analog Devices, Inc.

REV. B
A discrete drive circuit is used to achieve the best performance
from the SD5000 quad DMOS switch. This switch-driving cell
is composed of MPS571 RF NPN transistors and an MC10124
TTL-to-ECL translator. Using this technique provides both
high speed and highly symmetrical drive signals for the SD5000
switches. The switches arc arranged in a single-pole, double-
throw (SPDT) configuration. The 500 pF “flyback” capacitor is
switched to the op amp summing junction during the hold mode
to keep switching transients from feeding to the output. This ca-
pacitor is grounded during sample mode to minimize its effect
on acquisition time.
Careful circuit layout of the high speed SHA section is almost as
important as the design itself. Double-sided printed circuit
board, a compact layout, and short critical signal paths all ensure
best performance.
Op Amp Selection
When selecting the amplifier to be used for the DAC16’s I–V
converter, there are two main application areas; those requiring
high accuracy, and those seeking high speed. In high accuracy
applications, three parameters are of prime importance: (1)
input offset voltage. V
set voltage drift, TCV
performance must be maintained with an external reference
at +5 V, an op amp’s input offset voltage must be less than 15 V
( 0.1 LSB) with a bias current less than 6 nA. The op amp
must also exhibit high open-loop gain to keep the offset voltage
below this limit over the specified full-scale output range. Thus,
for a maximum output of 5 V, the op amp’s open loop gain
must be greater than 1300 V/mV.
For low frequency, high accuracy applications, Table IV lists
selected compatible operational amplifiers available from Analog
Devices. These operational amplifiers satisfy all the above
requirements and in most all cases will not require offset voltage
nulling.
Model
OP177
OP77
OP27
OP97
Table V. Precision Operational Amplifier the DAC16
1.6k
20k
V
10 V
25 V
25 V
25 V
–15V
OS
0.39 F
T/H
OS
OS
TCV
0.3 V/ C
0.6 V/ C
0.3 V/ C
2 V/ C
; (2) input bias current, –I
. In these applications where 16-bit
OS
TO PIN 2
SD5000
+5V
–5V
MC10124
Figure 27. A High Performance Deglitching Circuit
I
2 nA
2.8 nA
80 nA
0.15 nA
B
INPUT
249
–5V
B
A
12000 V/mV
2000 V/mV
1500 V/mV
2000 V/mV
169
; and (3) off-
360
VOL
Q1
+15V
–15V
510
IN4735
Q2
–11–
360
–5V
200
In high speed applications where resolution is more important
than absolute accuracy, operational amplifiers such as the
AD843 offer the requisite settling time. Although these amplifi-
ers are not specified for 16-bit performance, their settling times
are two to three times faster than the DAC16 and will introduce
negligible error to the overall circuit’s settling time. It is possible
to estimate the 16-bit settling time of an operational amplifier if
its 12-bit settling time is known. Assuming that the op amp can
be modeled by a single-pole response, then the ratio of the op
amp’s 16-bit settling time to its 12-bit settling can be expressed
as:
Since many operational amplifier data sheets provide charts
illustrating 0.01% settling time versus output voltage step size,
all that is required to estimate an op amp’s 16-bit settling time is
to multiply the 12-bit settling time for the required full-scale
voltage by 1.33. The circuit’s overall settling time can then be
approximated by the root-sum-square method:
where
t
t
As a design aid, Table VI illustrates a high speed operational
amplifier selector guide for devices compatible with the DAC16
for high speed applications. All these devices exhibit the requi-
site settling time, input offset voltage, and input bias current
consistent with maximum performance.
Model t
OP467 200 ns –0.01 0.5 mV 3.5 V/ C 0.5 A
AD817 70 ns –0.01
AD829 90 ns –0.1
AD841 110 ns –0.01 1 mV
AD843 135 ns –0.01 1 mV
AD845 350 ns –0.01 0.25 mV 5 V/ C
AD847 120 ns –0.01 1 mV
Q1, Q2 = MPS571
M1 – M4 = SD5000
DAC
OA
Table VI. High Speed Operational Amplifiers for the DAC16
169
= Op amp full-scale settling time
= DAC16’s specified full-scale settling time
14
249
S
13
16
to %
M1
6
3
t
S
V
2 mV
0.5 mV 0.3 V/ C 7 A
t
t
8
5
4
1
s
s
OS
M3
(16 bit )
(12 bit )
M4
11
(t
DAC
9
12
M2
)
TCV
10 V/ C 6.6 A
35 V/ C 5 A
12 V/ C 0.001 A 25 V/mV
15 V/ C 5 A
100pF
2
200
AD841
500pF
1.33
(t
OS
OA
)
2
75
I
0.001 A 500 V/mV
B
OUTPUT
DAC16
A
20 V/mV
6 V/mV
100 V/mV
45 V/mV
5.5 V/mV
VOL