dac1054 National Semiconductor Corporation, dac1054 Datasheet - Page 4

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dac1054

Manufacturer Part Number
dac1054
Description
Quad 10-bit Voltage-output Serial D/a Converter With Readback
Manufacturer
National Semiconductor Corporation
Datasheet

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AC ELECTRICAL CHARACTERISTICS (Continued)
Converter Electrical Characteristics
The following specifications apply for AV
the analog outputs – pins 2 13 17 and 23) and f
Note 1 Absolute Maximum Ratings indicate limits beyond which damage to the device may occur Operating Ratings indicate conditions for which the device is
functional These ratings do not guarantee specific performance limits however For guaranteed specifications and test conditions see the Converter Electrical
Characteristics The guaranteed specifications apply only for the test conditions listed Some performance characteristics may degrade when the device is not
operated under the listed test conditions
Note 2 All voltages are measured with respect to ground unless otherwise specified
Note 3 When the input voltage (V
to 5 mA or less
Note 4 The sum of the currents at all pins that are driven beyond the power supply voltages should not exceed 30 mA
Note 5 The maximum power dissipation must be derated at elevated temperatures and is dictated by T
(package junction to ambient thermal resistance) and T
P
packages and versions of the DAC1054
Note 6 Human body model 100 pF discharged through a 1 5 kX resistor
Note 7 See AN450 ‘‘Surface Mounting Methods and Their Effect on Production Reliability’’ of the section titled ‘‘Surface Mount’’ found in any current Linear
Databook for other methods of soldering surface mount devices
Note 8 Typicals are at T
Note 9 Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level)
Note 10 A monotonicity of 10 bits for the DAC1054 means that the output voltage changes in the same direction (or remains constant) for each increase in the
input code
Note 11 Integral linearity error is the maximum deviation of the output from the line drawn between zero and full-scale (excluding the effects of zero error and full-
scale error)
Note 12 Full-scale error is measured as the deviation from the ideal 2 800V full-scale output when V
Note 13 Full-scale error tempco and zero error tempco are defined by the following equation
where Error (T
voltage span of the DAC1054 which depends on V
Note 14 Zero error is measured as the deviation from the ideal 0 302V output when V
Note 15 Power Supply Sensitivity is the maximum change in the offset error or the full-scale error when the power supply differs from its optimum 5V by up to
0 50V (10%) The load resistor R
Note 16 Positive or negative settling time is defined as the time taken for the output of the DAC to settle to its final full-scale or zero output to within
This time shall be referenced to the 50% point of the positive edge of CS which initiates the update of the analog outputs
Note 17 Digital crosstalk is the glitch measured on the output of one DAC while applying an all 0s to all 1s transition at the input of the other DACs
Note 18 All DACs have full-scale outputs latched and DI is clocked with no update of the DAC outputs The glitch is then measured on the DAC outputs
Note 19 Clock feedthrough is measured for each DAC with its output at full-scale The serial clock is then applied to the DAC at a frequency of 10 MHz and the
glitch on each DAC full-scale output is measured
Note 20 Channel-to-channel isolation is a measure of the effect of a change in one DAC’s output on the output of another DAC The V
between 1 4V and 2 65V at a frequency of 15 kHz while the change in full-scale output of the second DAC is measured The first DAC is loaded with all 0s
Note 21 Glitch energy is the difference between the positive and negative glitch areas at the output of the DAC when a 1 LSB digital input code change is applied
to the input The glitch energy will have its largest value at one of the three major transitions The peak value of the maximum glitch is separately specified
Note 22 Power Supply Rejection Ratio is measured by varying AV
of this signal imposed on a full-scale output of the DAC under consideration
Note 23 The bandgap reference tempco is defined by the largest value from the following equations
where T
Note 24 A Military RETS specification is available upon request
e
Symbol
t
t
t
t
Dmax
CZ1
CZ0
1H
0H
T
Tempco (T
J
e
ROOM
from T
(T
Jmax
MAX
e
MAX
b
25 C V
MIN
) is the zero error or full-scale error at T
T
)
Output Hi-Z to Valid 1
Output Hi-Z to Valid 0
CS to Output Hi-Z
CS to Output Hi-Z
A
e
) H
to T
J
REF
V
JA
e
Parameter
REF
or the number given in the Absolute Maximum Ratings whichever is lower The table below details T
25 C and represent most likely parametric norm
(T
MAX
(T
MAX
L
IN
MAX
V
e
REF
) at any pin exceeds the power supply rails (V
) is the reference output at T
All other limits apply for T
2 kX
)
b
(T
V
ROOM
REF
Error tempco
(T
)
DAC1054CIN
DAC1054CIWM
Part Number
ROOM
CC
BIAS
e
)
and V
(
f
f
10 kX with 60 pF f
10 kX with 60 pF f
MAX
CLK
CLK
DV
e
A
T
CC
(in volts) and Error (T
REF
CLK
MAX
e
e
(ambient temperature) The maximum allowable power dissipation at any temperature is
Error (T
MAX
CC
e
5 MHz
5 MHz
b
10
e
e
5V V
and similarly for V
Conditions
6
T
A
DV
ROOM
MAX
10 MHz unless otherwise specified Boldface limits apply for T
e
CC
V
)
T
SPAN
(Continued)
REF
25 C
b
between 4 50V and 5 50V with a frequency of 10 kHz and measuring the proportion
Jmax
(
4
IN k
or Tempco (T
125
125
Error (T
CLK
CLK
e
( C)
MIN
GND or V
2 65V V
e
e
REF
) is the zero error or full-scale error at T
MIN
REF
5 MHz
5 MHz
)
e
(
(T
MIN
2 650V V
IN l
MIN
BIAS
)
T
e
) and V
MAX
V
H
a
REF
JA
V
10
e
) the absolute value of current at that pin should be limited
b
REF
BIAS
( C W)
42
57
6
REF
e
T
1 4V R
MIN
(Note 3)
(T
Typical
2 650V and V
e
V
MIN
(T
(
REF
1 400V and the digital input word is all zeros
ROOM
)
Jmax
b
L
(T
V
e
ROOM
)
REF
(maximum junction temperature) H
2 kX (R
BIAS
(T
)
ROOM
MIN
e
(Note 4)
Limit
150
130
1 400V
(in volts) V
L
Jmax
70
70
)
REF
(
is the load resistor on
of the first DAC is varied
and H
T
ROOM
SPAN
JA
10
b
for the various
6
is the output
T
ns (max)
ns (max)
ns (max)
ns (max)
(Limits)
g
MIN
Units
0 5 LSB
(
JA
A

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