adv7188 Analog Devices, Inc., adv7188 Datasheet - Page 103

• Manufacturer Part Number: adv7188
• Description: Multiformat Sdtv Video Decoder With Fast Switch Overlay Support
• Manufacturer: Analog Devices, Inc.

Address Register
0x4A
0x4B
0x4C
0x4E
Interrupt Status 3
(Read Only)
Interrupt Clear 3
(Write Only)
Interrupt Mask 2
(Read/Write)
Interrupt Status 4
(Read Only)
Bit Description
SD_OP_CHNG_Q. This bit indicates if the
SD 60 Hz or SD 50 Hz frame rate is at output.
SD_V_LOCK_CHNG_Q.
SD_H_LOCK_CHNG_Q.
SD_AD_CHNG_Q. SD autodetect changed.
SCM_LOCK_CHNG_Q. SECAM lock.
PAL_SW_LK_CHNG_Q.
Reserved.
Reserved.
SD_OP_CHNG_CLR.
SD_V_LOCK_CHNG_CLR.
SD_H_LOCK_CHNG_CLR.
SD_AD_CHNG_CLR.
SCM_LOCK_CHNG_CLR.
PAL_SW_LK_CHNG_CLR.
Reserved.
Reserved.
SD_OP_CHNG_MSKB.
SD_V_LOCK_CHNG_MSKB.
SD_H_LOCK_CHNG_MSKB.
SD_AD_CHNG_MSKB.
SCM_LOCK_CHNG_MSKB.
PAL_SW_LK_CHNG_MSKB.
Reserved.
Reserved.
VDP_CCAPD_Q.
Reserved.
VDP_CGMS_WSS_CHNGD_Q. See Register
0x9C, Bit 4, of the user sub map to
determine whether an interrupt is issued for
a change in detected data or when data
is detected regardless of content.
Reserved
Rev. A | Page 103 of 112
7 6 5 4 3 2 1 0
x
x
x
x
x
x
0
1
0
1
0
1
0
1
0
1
0
1
Bit
0
1
0
1
0
1
x
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
x
0
1
0
1
0
1
0
1
Comments
No change in SD signal standard
detected at the output.
A change in SD signal standard is
detected at the output.
No change in SD vertical sync lock
status.
SD vertical sync lock status has
changed.
No change in SD horizontal sync
lock status.
SD horizontal sync lock status has
changed.
No change in AD_RESULT [2:0] bits
in Status Register 1.
AD_RESULT [2:0] bits in Status
Register 1 have changed.
No change in SECAM lock status.
SECAM lock status has changed.
No change in PAL swinging burst
lock status.
PAL swinging burst lock status has
changed.
Not used.
Not used.
Do not clear.
Clears SD_OP_CHNG_Q bit.
Do not clear.
Clears SD_V_LOCK_CHNG_Q bit.
Do not clear.
Clears SD_H_LOCK_CHNG_Q bit.
Do not clear.
Clears SD_AD_CHNG_Q bit.
Do not clear.
Clears SCM_LOCK_CHNG_Q bit.
Do not clear.
Clears PAL_SW_LK_CHNG_Q bit.
Not used.
Not used.
Masks SD_OP_CHNG_Q bit.
Unmasks SD_OP_CHNG_Q bit.
Masks SD_V_LOCK_CHNG_Q bit.
Unmasks SD_V_LOCK_CHNG_Q bit.
Masks SD_H_LOCK_CHNG_Q bit.
Unmasks SD_H_LOCK_CHNG_Q bit.
Masks SD_AD_CHNG_Q bit.
Unmasks SD_AD_CHNG_Q bit.
Masks SCM_LOCK_CHNG_Q bit.
Unmasks SCM_LOCK_CHNG_Q bit.
Masks PAL_SW_LK_CHNG_Q bit.
Unmasks PAL_SW_LK_CHNG_Q bit.
Not used.
Not used.
Closed captioning not detected.
Closed captioning detected.
CGMS/WSS data is not changed/not
available.
CGMS/WSS data is changed/available.
Notes
These bits can be cleared and
masked by Register 0x4B if no
change is detected and by
Register 0x4C if a change is
detected.
These bits can be cleared by
Register 0x4F and masked by
Register 0x50.
Note that an interrupt in
Register 0x4E for the CC,
Gemstar, CGMS, WSS, VPS,
PDC, UTC, and VITC data can
be initiated by using the VDP
data slicer.
ADV7188