tda9898 NXP Semiconductors, tda9898 Datasheet - Page 46

• Manufacturer Part Number: tda9898
• Description: Multistandard Hybrid If Processing Semiconductors
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 53.
V
f
for L); IF input from 50
B/G is 10 % and for L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0] = 0); not dual mode; measurements taken in test circuit of
unless otherwise specified.
TDA9897_TDA9898_3
Product data sheet
Symbol
TAGC loop based on VIF AGC (W6[7:6] = 11); TAGC is voltage output; applicable for TV mode: positive modulation and
optional for negative modulation); see
V
V
TOP adjust 2; pin TOP2; IF based TAGC loop mode; see
V
R
R
Pin CTAGC
V
I
Control current or voltage monitor output; pin MPP2
General
V
V
SC
L
P
i(IF)(RMS)
acc(set)TOP2
O
G
TOP2
CTAGC
sat(u)
sat(l)
I
TOP2
= 5 V; T
acc(set)TOP2
= 32.875 MHz; PC / SC = 13 dB; f
slip(TAGC)
amb
Characteristics
/ T TOP2 setting accuracy
= 25 C; see
Parameter
RMS IF input voltage
TOP2 setting accuracy
variation with temperature
output voltage
TAGC slip gain offset
voltage on pin TOP2 (DC)
input resistance
resistance on pin TOP2
voltage on pin CTAGC
leakage current
upper saturation voltage
lower saturation voltage
via broadband transformer 1 : 1; video modulation: Vestigial SideBand (VSB); residual carrier for
Table 25
…continued
for input frequencies; B/G standard is used for the specification (f
AF
Table
= 400 Hz); input level V
49;
Figure 13
Rev. 03 — 11 January 2008
Conditions
at starting point of tuner
AGC takeover;
V
V
no tuner gain reduction
maximum tuner gain
reduction
tuner gain voltage from
0.6 V to 3.5 V
pin open-circuit
adjustment of VIF AGC
based TAGC loop
sink
source
TAGC
TAGC
R
W10[5:0] = 00 0000
R
W10[5:0] = 01 0000
R
W10[5:0] = 01 1111
W10[5] = 1; external
resistor operation
W10[5] = 0; forced
I
2
TOP2
TOP2
TOP2
C-bus operation
= 3.5 V
= 3.5 V
and
= 22 k or
= 10 k or
= 0 k
Figure 14
Figure 14
i(IF)
= 10 mV (RMS) (sync level for B/G; peak white level
TDA9897; TDA9898
[3]
[3]
[3]
Multistandard hybrid IF processing
Min
-
-
-
-
-
4.5
0.2
3
-
-
0
100
0.2
-
-
V
-
6
P
0.8 V
Typ
61
81
96
99
-
0.03
-
-
5
3.5
27
-
-
-
-
-
0.5
P
Figure 50
0.5 -
PC
© NXP B.V. 2008. All rights reserved.
= 38.375 MHz;
Max
-
-
-
-
+6
0.07
V
0.6
8
-
-
22
-
0.55V
10
10
0.8
P
and
P
Figure
Unit
dB V
dB V
dB V
dB V
dB
dB/K
V
V
dB
V
k
k
k
V
nA
nA
V
V
46 of 103
51;