pca9601 NXP Semiconductors, pca9601 Datasheet - Page 15

• Manufacturer Part Number: pca9601
• Description: Dual Bidirectional Bus Buffer
• Manufacturer: NXP Semiconductors

NXP Semiconductors
PCA9601_1
Product data sheet
Fig 16. Falling edge of SCL at master is delayed by the buffers and bus fall times
Fig 17. Rising edge of SCL at master is delayed (clock stretch) by buffer and bus rise times
V
CCM
MASTER
Effective delay of SCL at slave: 120 + 17V
C = F; V = V.
Effective delay of SCL at master: 115 + (Rm × Cm) + (0.7 × Rb × Cb) (ns).
C = F; R = Ω.
I
2
C-BUS
local master bus
10.1 Calculating system delays and bus clock frequency
GND (0 V)
SCL
V
CCM
MASTER
I
2
C-BUS
Rm
Cm
master bus
capacitance
local master bus
GND (0 V)
V
SX
CCB
SCL
All information provided in this document is subject to legal disclaimers.
PCA9601
CCM
Rev. 01 — 28 May 2010
+ (2.5 + 4 × 10
TX/RX
Rm
buffered expansion bus
Cm
master bus
capacitance
V
SX
CCB
Cb
buffered bus
wiring capacitance
Rb
PCA9601
TX/RX
9
× C
b
) × V
buffered expansion bus
PCA9601
CCB
TX/RX
+ 10V
SX
Rb
CCS
Cb
buffered bus
wiring capacitance
(ns).
TX/RX
Dual bidirectional bus buffer
002aae881
Rs
Cs
slave bus
capacitance
remote slave bus
SCL
PCA9601
© NXP B.V. 2010. All rights reserved.
I
2
C-BUS
SLAVE
002aae880
V
CCS
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