pca9633 NXP Semiconductors, pca9633 Datasheet - Page 16

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pca9633

Manufacturer Part Number
pca9633
Description
Pca9633 4-bit Fm+ I2c-bus Led Driver
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
PCA9633_3
Product data sheet
7.4 Active LOW output enable input
7.5 Power-on reset
The active LOW output enable (OE) pin, allows to enable or disable all the LED outputs at
the same time.
This control signal is only available for the 16-pin version and does not apply to the 8-pin
or 10-pin versions.
Table 16.
The OE pin can be used as a synchronization signal to switch on/off several PCA9633
devices at the same time. This requires an external clock reference that provides blinking
period and the duty cycle.
The OE pin can also be used as an external dimming control signal. The frequency of the
external clock must be high enough not to be seen by the human eye, and the duty cycle
value determines the brightness of the LEDs.
Remark: Do not use OE as an external blinking control signal when internal global
blinking is selected (DMBLNK = 1, MODE2 register) since it will result in an undefined
blinking pattern. Do not use OE as an external dimming control signal when internal global
dimming is selected (DMBLNK = 0, MODE2 register) since it will result in an undefined
dimming pattern.
When power is applied to V
condition until V
PCA9633 registers and I
zeroes) causing all the channels to be deselected. Thereafter, V
0.2 V to reset the device.
OUTNE1
0
0
1
1
When a LOW level is applied to OE pin, all the LED outputs are enabled and follow the
output state defined in the LEDOUT register with the polarity defined by INVRT bit
(MODE2 register).
When a HIGH level is applied to OE pin, all the LED outputs are programmed to the
value that is defined by OUTNE[1:0] in the MODE2 register.
LED outputs when OE = 1
OUTNE0
0
1
0
1
DD
has reached V
Rev. 03 — 20 December 2006
2
C-bus state machine are initialized to their default states (all
DD
LED outputs
0
1 if OUTDRV = 1, high-impedance if OUTDRV = 0
high-impedance
reserved
, an internal Power-on reset holds the PCA9633 in a reset
POR
. At this point, the reset condition is released and the
4-bit Fm+ I
DD
must be lowered below
PCA9633
2
© NXP B.V. 2006. All rights reserved.
C-bus LED driver
16 of 42

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