pca9670 NXP Semiconductors, pca9670 Datasheet
pca9670
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pca9670 Summary of contents
Page 1
... The difference between the PCA9670 and the PCF8574 is that the interrupt output on the PCF8574 is replaced by a RESET input on the PCA9670. The devices consist of an 8-bit quasi-bidirectional port and an I PCA9670 have low current consumption and include latched outputs with 25 mA high current drive capability for directly driving LEDs ...
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... AD0 AD1 AD2 SCL SDA RESET Fig 1. Block diagram of PCA9670 PCA9670_2 Product data sheet Remote 8-bit I/O expander for Fm+ I Description plastic thermal enhanced very thin quad flat package; no leads; 16 terminals; body 3 3 0.85 mm plastic small outline package; 16 leads; body width 7.5 mm plastic thin shrink small outline package ...
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... I OH 100 A I trt(pu interrupt logic 002aac109 1 AD0 AD1 2 AD2 PCA9670PW 002aac258 Fig 4. Pin configuration for TSSOP16 12 SCL 11 RESET 002aac261 © NXP B.V. 2007. All rights reserved ...
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... Rev. 02 — 17 July 2007 PCA9670 2 C-bus with reset Description address input 0 address input 1 address input 2 quasi-bidirectional I/O 0 quasi-bidirectional I/O 1 quasi-bidirectional I/O 2 quasi-bidirectional I/O 3 supply ground quasi-bidirectional I/O 4 quasi-bidirectional I/O 5 quasi-bidirectional I/O 6 quasi-bidirectional I/O 7 reset input (active LOW) serial clock line serial data line supply voltage pin and the exposed center pad ...
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... To conserve power, no internal pull-up resistors are incorporated on AD2, AD1, and AD0. Address values depending on AD2, AD1, and AD0 can be found in Table 3 “PCA9670 address Remark: When using the PCA9670, reserved I caution since they can interfere with: • “reserved for future use” I 1111 111) • ...
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... PCA9670_2 Product data sheet Remote 8-bit I/O expander for Fm+ I PCA9670 address map AD1 AD0 A6 A5 SCL SCL SDA SDA SCL ...
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... SDA SCL SCL SCL SCL SDA SDA SDA SDA SCL SCL SCL SCL SDA SDA SDA SDA PCA9670_2 Product data sheet Remote 8-bit I/O expander for Fm+ I PCA9670 address map …continued AD1 AD0 A6 A5 SCL SCL SDA ...
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... The PCA9670 acknowledges this value only. If the byte is not equal to 06h, the PCA9670 does not acknowledge it. If more than 1 byte of data is sent, the PCA9670 does not acknowledge any more. 5. Once the right byte has been sent and correctly acknowledged, the master sends a ...
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... NXP). • 13 bits with the part identification, assigned by manufacturer, the 7 MSBs with the category ID and the 6 LSBs with the feature ID (for example, for example PCA9670 16-bit quasi-output I/O expander). • 3 bits with the die revision, assigned by manufacturer (for example, Rev X). ...
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... NXP Semiconductors Remark: If the master continues to ACK the bytes after the third byte, the PCA9670 rolls back to the first byte and keeps sending the Device ID sequence until a NACK has been detected. For the PCA9670, the Device shown in Fig 10. PCA9670 ...
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... The PCA9670 acknowledges and the master sends the data byte for and is acknowledged by the PCA9670. The 8-bit data is presented on the port lines after it has been acknowledged by the PCA9670. ...
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... A DATA 1 R/W acknowledge from slave DATA 2 DATA h(D) su( internal Power-On Reset (POR) holds the PCA9670 in DD has reached that point, the reset condition is released DD POR 2 C-bus/SMBus state machine will initialize to their default must be lowered below 0 reset the device C-bus state machine will be held in their default state until the Rev. 02 — ...
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... Remote 8-bit I/O expander for Fm C-bus Figure SDA SCL data line stable; data valid Figure 15.) S START condition Rev. 02 — 17 July 2007 PCA9670 2 C-bus with reset 14). change of data allowed mba607 P STOP condition © NXP B.V. 2007. All rights reserved. SDA SCL mba608 ...
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... SCL from master 1 S START condition 2 C-bus Rev. 02 — 17 July 2007 16). MASTER MASTER TRANSMITTER/ MULTIPLEXER RECEIVER SLAVE not acknowledge acknowledge 2 8 clock pulse for acknowledgement PCA9670 2 C-bus with reset 2 I C-BUS 002aaa966 9 002aaa987 © NXP B.V. 2007. All rights reserved ...
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... PROCESSOR RESET AD0 AD1 AD2 V DD SDA CORE SCL PROCESSOR RESET AD0 AD1 AD2 Rev. 02 — 17 July 2007 PCA9670 2 C-bus with reset Figure 18, P0 and P1 are inputs, and temperature sensor P1 battery status P2 control for latch P3 control for switch P4 control for audio ...
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... Parameter Conditions supply voltage supply current ground supply current input voltage input current output current total power dissipation power dissipation per output storage temperature ambient temperature operating Rev. 02 — 17 July 2007 PCA9670 2 C-bus with reset Min Max Unit 0 100 mA - 400 ...
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... MHz kHz [1] - 1.8 0 250 0.5 1 0 PCA9670 2 C-bus with reset Max Unit 5.5 V 500 2.0 V +0. 5 200 mA 300 +0 +0. 5.5 V ...
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... SCL signal) in order to IL PCA9670 2 C-bus with reset Unit 2 I C-bus Min Max 0 1000 kHz 0 0. 450 0 120 ns - 120 ...
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... MSB (A6) (A7 LOW HIGH 1 /f SCL SU;DAT HD;DAT and Rev. 02 — 17 July 2007 PCA9670 2 STOP bit 0 acknowledge condition (R/W) (A) ( VD;DAT VD;ACK SU;STO 002aab175 ACK or read cycle t rst w(rst) t rst 50 % output off 002aac018 © ...
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... 3.1 1.75 3.1 1.75 0.5 1.5 2.9 1.45 2.9 1.45 REFERENCES JEDEC JEITA MO-220 - - - Rev. 02 — 17 July 2007 detail 0.5 0.05 0.1 1.5 0.1 0.05 0.3 EUROPEAN PROJECTION PCA9670 2 C-bus with reset SOT758 ISSUE DATE 02-03-25 02-10-21 © NXP B.V. 2007. All rights reserved ...
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... detail 1.1 1.1 1.4 0.25 0.25 0.4 1.0 0.043 0.043 0.055 0.01 0.01 0.016 0.039 EUROPEAN PROJECTION PCA9670 2 C-bus with reset SOT162 ( 0.9 0 0.035 0.004 0.016 ISSUE DATE 99-12-27 03-02-19 © NXP B.V. 2007. All rights reserved ...
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... MO-153 Rev. 02 — 17 July 2007 detail 6.6 0.75 0.4 1 0.2 0.13 6.2 0.50 0.3 EUROPEAN PROJECTION PCA9670 2 C-bus with reset SOT403 ( 0.40 8 0.1 o 0.06 0 ISSUE DATE 99-12-27 03-02-18 © NXP B.V. 2007. All rights reserved ...
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... Inspection and repair • Lead-free soldering versus PbSn soldering 16.3 Wave soldering Key characteristics in wave soldering are: PCA9670_2 Product data sheet Remote 8-bit I/O expander for Fm+ I Rev. 02 — 17 July 2007 PCA9670 2 C-bus with reset © NXP B.V. 2007. All rights reserved ...
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... Lead-free process (from J-STD-020C) Package reflow temperature ( C) 3 Volume (mm ) < 350 260 260 250 Figure 25. Rev. 02 — 17 July 2007 PCA9670 2 C-bus with reset Figure 25) than a PbSn process, thus 350 220 220 350 to 2000 > 2000 260 260 250 245 245 245 © ...
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... Integrated Circuit Inter IC bus Identification Least Significant Bit Machine Model Most Significant Bit Programmable Logic Controller Redundant Array of Independent Disks Rev. 02 — 17 July 2007 PCA9670 2 C-bus with reset peak temperature time 001aac844 © NXP B.V. 2007. All rights reserved ...
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... Legal texts have been adapted to the new company name where appropriate. • Table 1 “Ordering – changed Topside mark for PCA9670BS from “9670” to “670” – changed Topside mark for PCA9670PW from “9670” to “PCA9670” • Table 5 “Static – changed I – ...
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... Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners C-bus — logo is a trademark of NXP B.V. http://www.nxp.com salesaddresses@nxp.com Rev. 02 — 17 July 2007 PCA9670 2 C-bus with reset © NXP B.V. 2007. All rights reserved ...
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... Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 Functional description . . . . . . . . . . . . . . . . . . . 5 7.1 Device address . . . . . . . . . . . . . . . . . . . . . . . . . 5 7.1.1 Address maps 7.2 Software Reset Call, and device ID addresses. 8 7.2.1 Software Reset . . . . . . . . . . . . . . . . . . . . . . . . . 8 7.2.2 Device ID (PCA9670 ID field I/O programming . . . . . . . . . . . . . . . . . . . . . . . 11 8.1 Quasi-bidirectional I/O architecture . . . . . . . . 11 8.2 Writing to the port (Output mode 8.3 Reading from a port (Input mode 8.4 Power-on reset . . . . . . . . . . . . . . . . . . . . . . . . 12 8.5 RESET input . . . . . . . . . . . . . . . . . . . . . . . . . . Characteristics of the I 9 ...