pca9671 NXP Semiconductors, pca9671 Datasheet - Page 16

• Manufacturer Part Number: pca9671
• Description: Remote 16-bit I/o Expander For Fm+ I2c-bus With Reset
• Manufacturer: NXP Semiconductors

NXP Semiconductors
9. Characteristics of the I
PCA9671_1
Product data sheet
9.1.1 START and STOP conditions
8.4 Power-on reset
8.5 RESET input
9.1 Bit transfer
When power is applied to V
a reset condition until V
and the PCA9671 registers and I
states. Thereafter V
A reset can be accomplished by holding the RESET pin LOW for a minimum of t
PCA9671 registers and I
RESET input is once again HIGH.
The I
lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be
connected to a positive supply via a pull-up resistor when connected to the output stages
of a device. Data transfer may be initiated only when the bus is not busy.
One data bit is transferred during each clock pulse. The data on the SDA line must remain
stable during the HIGH period of the clock pulse as changes in the data line at this time
will be interpreted as control signals (see
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW
transition of the data line while the clock is HIGH is defined as the START condition (S). A
LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the STOP
condition (P) (see
Fig 19. Bit transfer
2
C-bus is for 2-way, 2-line communication between different ICs or modules. The two
2
SDA
SCL
Figure
C-bus
DD
Rev. 01 — 20 December 2006
must be lowered below 0.2 V to reset the device.
DD
2
20).
C-bus state machine will be held in their default state until the
has reached V
DD
, an internal Power-On Reset (POR) holds the PCA9671 in
Remote 16-bit I/O expander for Fm+ I
2
C-bus/SMBus state machine will initialize to their default
data valid
data line
stable;
POR
Figure
. At that point, the reset condition is released
allowed
change
of data
19).
mba607
PCA9671
© NXP B.V. 2006. All rights reserved.
2
C-bus with reset
w(rst)
16 of 34
. The