pca9506 NXP Semiconductors, pca9506 Datasheet - Page 12

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pca9506

Manufacturer Part Number
pca9506
Description
40-bit I2c-bus I/o Port With Reset, Oe, And Int
Manufacturer
NXP Semiconductors
Datasheet

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Philips Semiconductors
Table 7:
Legend: * default value.
Table 8:
Legend: * default value.
9397 750 14939
Product data sheet
Address
18h
19h
1Ah
1Bh
1Ch
Address
20h
21h
22h
23h
24h
IOC0 to IOC4 - I/O Configuration registers (address 18h to 1Ch) bit description
MSK0 to MSK4 - Mask interrupt registers (address 20h to 24h) bit description
Register
IOC0
IOC1
IOC2
IOC3
IOC4
Register
MSK0
MSK1
MSK2
MSK3
MSK4
7.3.4 IOC0 to IOC4 - I/O Configuration registers
7.3.5 MSK0 to MSK4 - Mask interrupt registers
7.4 Power-on reset
7.5 RESET input
These registers configure the direction of the I/O pins.
Where ‘x’ refers to the bank number (0 to 4); ‘y’ refers to the bit number (0 to 7).
These registers mask the interrupt due to a change in the I/O pins configured as inputs. ‘x’
refers to the bank number (0 to 4); ‘y’ refers to the bit number (0 to 7).
When power is applied to V
a reset condition until V
and the PCA9506 registers and I
Thereafter, V
A reset can be accomplished by holding the RESET pin LOW for a minimum of t
PCA9506 registers and I
RESET input is once again HIGH.
Cx[y] = 0: The corresponding port pin is an output.
Cx[y] = 1: The corresponding port pin is an input.
Mx[y] = 0: A level change at the I/O will generate an interrupt if IOx_y defined as input
(Cx[y] in IOC register = 1).
Mx[y] = 1: A level change in the input port will not generate an interrupt if IOx_y defined
as input (Cx[y] in IOC register = 1).
Bit
7 to 0
7 to 0
7 to 0
7 to 0
7 to 0
Bit
7 to 0
7 to 0
7 to 0
7 to 0
7 to 0
DD
must be lowered below 0.2 V to reset the device.
Symbol
C0[7:0]
C1[7:0]
C2[7:0]
C3[7:0]
C4[7:0]
Symbol
M0[7:0]
M1[7:0]
M2[7:0]
M3[7:0]
M4[7:0]
Rev. 01 — 14 February 2006
DD
2
C-bus state machine will be held in their default states until the
has reached V
DD
, an internal Power-On Reset (POR) holds the PCA9506 in
Access
R/W
R/W
R/W
R/W
R/W
Access
R/W
R/W
R/W
R/W
R/W
2
C-bus state machine will initialize to their default states.
40-bit I
POR
Value
1111 1111*
1111 1111*
1111 1111*
1111 1111*
1111 1111*
Value
1111 1111*
1111 1111*
1111 1111*
1111 1111*
1111 1111*
. At that point, the reset condition is released
2
C-bus I/O port with RESET, OE, and INT
Description
I/O Configuration register bank 0
I/O Configuration register bank 1
I/O Configuration register bank 2
I/O Configuration register bank 3
I/O Configuration register bank 4
Description
Mask Interrupt register bank 0
Mask Interrupt register bank 1
Mask Interrupt register bank 2
Mask Interrupt register bank 3
Mask Interrupt register bank 4
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PCA9506
w(rst)
12 of 30
. The

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