pca9545ad NXP Semiconductors, pca9545ad Datasheet - Page 7

• Manufacturer Part Number: pca9545ad
• Description: 4-channel I2c Switch With Interrupt Logic And Reset
• Manufacturer: NXP Semiconductors

NXP Semiconductors
PCA9545A_45B_45C_6
Product data sheet
6.2.1 Control register definition
6.2 Control register
Following the successful acknowledgement of the slave address, the bus master will send
a byte to the PCA9545A/45B/45C, which will be stored in the control register. If multiple
bytes are received by the PCA9545A/45B/45C, it will save the last byte received. This
register can be written and read via the I
One or several SCx/SDx downstream pair, or channel, is selected by the contents of the
control register. This register is written after the PCA9545A/45B/45C has been
addressed. The 4 LSBs of the control byte are used to determine which channel is to be
selected. When a channel is selected, the channel will become active after a STOP
condition has been placed on the I
HIGH state when the channel is made active, so that no false conditions are generated at
the time of connection.
Table 4.
Remark: Several channels can be enabled at the same time. Example: B3 = 0, B2 = 1,
B1 = 1, B0 = 0, means that channel 0 and channel 3 are disabled and channel 1 and
channel 2 are enabled. Care should be taken not to exceed the maximum bus capacity.
INT3
X
X
X
X
0
Fig 8. Control register
INT2
X
X
X
X
0
Control register: write (channel selection); read (channel status)
INT1
X
X
X
X
0
Rev. 06 — 19 March 2007
INT0
X
X
X
X
0
INT
7
3
interrupt bits
(read only)
INT
6
2
4-channel I
B3
X
X
X
0
1
0
INT
5
1
2
C-bus. This ensures that all SCx/SDx lines will be in a
INT
4
0
B2
X
X
0
1
X
0
2
B3
C-bus.
3
2
channel selection bits
(read/write)
C-bus switch with interrupt logic and reset
B2
2
B1
X
0
1
X
X
0
PCA9545A/45B/45C
B1
1
B0
0
B0
0
1
X
X
X
0
002aab170
channel 0
channel 1
channel 2
channel 3
INT0
INT1
INT2
INT3
Command
channel 0 disabled
channel 0 enabled
channel 1 disabled
channel 1 enabled
channel 2 disabled
channel 2 enabled
channel 3 disabled
channel 3 enabled
no channel selected;
power-up/reset default state
© NXP B.V. 2007. All rights reserved.
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