uda1341ts-n1 NXP Semiconductors, uda1341ts-n1 Datasheet - Page 15

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uda1341ts-n1

Manufacturer Part Number
uda1341ts-n1
Description
Economy Audio Codec For Minidisc Md Home Stereo And Portable Applications
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
7.21.1
Table 6 Data transfer of type ‘STATUS’
7.21.1.1
A 1-bit value to initialize the L3-registers with the default
settings except system clock frequency.
Table 7 Reset settings
7.21.1.2
A 2-bit value to select the used external clock frequency.
Table 8 System clock settings
7.21.1.3
A 1-bit value to enable the digital DC-filter.
Table 9 DC-filtering settings
2002 May 16
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
SC1 SC0
0
0
1
1
Economy audio CODEC for MiniDisc (MD)
home stereo and portable applications
0
1
RST
DC
0
1
0
1
OGS
0
1
0
1
RST
STATUS
Reset
System clock frequency
DC-filter
no reset
reset
512f
384f
256f
not used
no DC-filtering
DC-filtering
SC1
IGS
s
s
s
CONTROL
SC0
PAD
FUNCTION
FUNCTION
FUNCTION
PDA
IF2
IF1
DS
PC1
IF0
PC0 OGS = output gain (6 dB) switch
DC
15
RST = reset
SC = system clock frequency (2 bits)
IF = data input format (3 bits)
DC = DC-filter
IGS = input gain (6 dB) switch
PAD = polarity of ADC
PDA = polarity of DAC
DS = double speed
PC = power control (2 bits)
7.21.1.4
A 3-bit value to select the data input format.
Table 10 Data input format settings
IF2 IF1 IF0
0
0
0
0
1
1
1
1
0
1
1
0
0
1
1
0
Data input format
0
1
0
1
0
1
0
1
REGISTER SELECTED
I
LSB-justified 16 bits
LSB-justified 18 bits
LSB-justified 20 bits
MSB-justified
LSB-justified 16 bits input and
MSB-justified output
LSB-justified 18 bits input and
MSB-justified output
LSB-justified 20 bits input and
MSB-justified output
2
S-bus
FUNCTION
UDA1341TS
Product specification

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