clc5632 National Semiconductor Corporation, clc5632 Datasheet - Page 13
![no-image](/images/no-image-200.jpg)
clc5632
Manufacturer Part Number
clc5632
Description
Dual, High Output, Programmable Gain Buffer
Manufacturer
National Semiconductor Corporation
Datasheet
1.CLC5632.pdf
(19 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CLC5632
Manufacturer:
NSC
Quantity:
5 510
Company:
Part Number:
clc56321M
Manufacturer:
NS
Quantity:
2 486
Company:
Part Number:
clc56321M
Manufacturer:
WESTCOD
Quantity:
2 493
Company:
Part Number:
clc5632IM
Manufacturer:
NSC
Quantity:
10 000
Part Number:
clc5632IM
Manufacturer:
NS/国半
Quantity:
20 000
Part Number:
clc5632IMX
Manufacturer:
NS/国半
Quantity:
20 000
Part Number:
clc5632IN
Manufacturer:
NS/国半
Quantity:
20 000
Application Division
AC Coupled Single Supply Operation
Figure 4 , Figure 5 , and Figure 6 show possible non-inverting
and inverting configurations for input signals that go below
0.8V DC.
The input is AC coupled to prevent the need for level shifting
the input signal at the source. The resistive voltage divider
biases the non-inverting input to V
+5V)
V
V
FIGURE 4. AC Coupled, A
FIGURE 5. AC Coupled, A
FIGURE 6. AC Coupled, A
in
CC
V
Note: Channel 2 not shown.
R
R
in
C
Note: Channel 2 not shown.
Note: Channel 2 not shown.
C
C
V
V
V
in
C
CC
o
V
V
R
R
V
o
CC
C
o
R
R
C
C
2
3
1
4
3
2
4
1
3
1
2
4
1k
CLC5632
1k
CLC5632
1k
CLC5632
1k
1k
+
1k
-
1k
+
-
1k
-
+
-
+
+
1k
-
+
-
1k
V
V
V
1k
1k
= −1V/V Configuration
= +1V/V Configuration
= +2V/V Configuration
CC
V
Low frequency cutoff
where R
(Continued)
8
7
6
5
where R g = 1k .
o
V
Low frequency cutoff
8
7
6
5
V
Low frequency cutoff
where R
o
o
8
7
6
5
÷ 2 = 2.5V (For V
V
in
2V
in
V
V
in
V
in
2.5
in
V
CC
CC
R
2
2.5
CC
2.5
R
2
6.8 F
0.1 F
R
6.8 F
0.1 F
+
6.8 F
0.1 F
R
DS015003-43
+
+
2 R C
DS015003-42
R
source
2 R C
R
2 R C
1
source
in C
1
in C
1
g C
DS015003-44
,
CC
,
,
=
13
Dual Supply Operation
The CLC5632 operates on dual supplies as well as single
supplies. The non-inverting and inverting configurations are
shown in Figure 7 , , and .
V
FIGURE 7. Dual Supply, A
FIGURE 8. Dual Supply, A
FIGURE 9. Dual Supply, A
V
V
in
in
in
R
R
R
R
V
V
t
b
t
t
o
V
V
o
V
EE
o
V
EE
EE
0.1 F
6.8 F
0.1 F
6.8 F
0.1 F
6.8 F
3
1
2
4
2
3
4
1
+
+
3
+
2
4
1
1k
1k
CLC5632
CLC5632
1k
CLC5632
1k
1k
1k
+
1k
-
1k
-
+
+
-
+
-
1k
-
+
+
-
1k
V
V
V
1k
1k
= −1V/V Configuration
= +1V/V Configuration
= +2V/V Configuration
Note: Channel 2 not shown.
Note: Channel 2 not shown.
Note: R
non-inverting input. Select R
yield desired R
Channel 2 not shown.
6
8
7
5
8
7
6
5
8
7
6
5
b
V
V
provides DC bias for the
CC
V
CC
CC
in
= R
6.8 F
0.1 F
6.8 F
0.1 F
+
+
6.8 F
0.1 F
t
||1k .
www.national.com
+
DS015003-45
t
DS015003-46
DS015003-47
to