tda8757a NXP Semiconductors, tda8757a Datasheet - Page 28
tda8757a
Manufacturer Part Number
tda8757a
Description
Tda8757a Triple 8-bit Adc 205 Msps
Manufacturer
NXP Semiconductors
Datasheet
1.TDA8757A.pdf
(37 pages)
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Philips Semiconductors
Table 18: Examples of PLL settings and performance
V
[1]
9397 750 09549
Preliminary data
Video standards
VESA: 640
(VGA 60 Hz)
VESA: 800
(SVGA 72 Hz)
VESA: 1024
(XGA 75 Hz)
VESA: 1280
(SXGA 60 Hz)
VESA: 1280
(SXGA 75 Hz)
VESA: 1600
(UXGA 60 Hz)
VESA: 1600
(UXGA 75 Hz)
CCA
Fig 10. Data timing; Dmx = 0; n = even pixel.
Fig 11. Timing diagram; single port mode (Dmx = 0).
PLL long-term time jitter is measured at the end of the video line, where it is at its maximum.
= V
CKDATA
TESTO
RGBIN
RGBIN
DDD
= V
480
600
768
1024
1024
1200
1200
CCD
= V
1
CCO
CKDATA
= 5 V; T
DATA
f
(kHz)
31.469 25.175 800
48.08
60.02
63.98
80.00
75.00
93.75
ref
2
V in
amb
Sample n
t d(s)
f
(MHz)
50
78.75
108
135
162
202.5
3
1
clk
n
= 25 C.
I n 1
t CPH
N
1040
1312
1688
1688
2160
2160
4
2
Rev. 01 — 22 March 2002
Sample n 1
K
(MHz/V)
20
30
60
60
115
115
115
5
3
O
I n
6
4
C
(nF)
68
68
68
68
68
68
68
Z
t su(d)(o)
Sample n 2
t CPL
C
(nF)
0.15
0.15
0.15
0.15
0.15
0.15
0.15
7
5
P
I n 1
t h(o)
I
( A)
700
400
700
700
400
400
700
P
8
6
Sample n 3
Z
(k )
1.6
3.2
6
2.25 tbf
2.25 tbf
3.2
2.25 56
FCE700
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
9
7
Long-term time jitter
RMS-value
(ps)
tbf
tbf
tbf
tbf
50%
2.4 V
0.4 V
Triple 8-bit ADC 205 Msps
10
8
TDA8757A
11
9
peak-to-peak
value (ps)
tbf
tbf
tbf
tbf
tbf
tbf
336
MGW779
[1]
10
28 of 37
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