tda8764ats/6 NXP Semiconductors, tda8764ats/6 Datasheet - Page 10

• Manufacturer Part Number: tda8764ats/6
• Description: 10-bit High-speed Low-power Adc
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Notes
1.
2. The input admittance is
3. Analog input voltages producing code 0 up to and including code 1023:
4. In order to ensure the optimum linearity performance of such converter architecture the lower and upper extremities
5.
6. The analog bandwidth is defined as the maximum input sine wave frequency which can be applied to the device.
2000 Jul 03
SYMBOL
Timing (f
t
t
t
t
C
SR
3-state output delay times (f
t
t
t
t
ds
h
d
d
dZH
dZL
dHZ
dLZ
L
10-bit high-speed low-power ADC
a) V
b) V
of the converter reference resistor ladder (corresponding to output codes 0 and 1023 respectively) are connected to
pins V
a) The current flowing into the resistor ladder is
b) Since R
No glitches greater than 2 LSBs, nor any significant attenuation are observed in the reconstructed signal.
E
The rise and fall times of the clock signal must not be less than 0.5 ns.
G
and the reference voltage BOTTOM (V
produces data outputs equal to code 1023 at T
to cover code 0 to 1023, is
codes at a given input voltage depends mainly on the difference V
supply voltage. When several ADCs are connected in parallel and fed with the same reference source, the
matching between each of them is then optimized.
----------------------------------------- -
R
=
offset(B)
offset(T)
OB
RB
clk
----------------------------------------------------
V
sampling delay time
output hold time
output delay time TDA8764ATS
output delay time TDA8764AHL
digital output load capacitance
slew rate
enable HIGH
enable LOW
disable HIGH
disable LOW
+
= 60 MHz; C
and V
1023
R
R
L
(offset voltage TOP) is the difference between V
(offset voltage BOTTOM) is the difference between the analog input which produces data equal to 00
L
L
, R
+
–
V
RT
OB
R
V
i(p-p)
OT
0
PARAMETER
via offset resistors R
and R
–
will be kept reasonably constant from device to device. Consequently variation of the output
V
L
i(p-p)
= 10 pF); see Fig.5 and note 10
Y
OT
i
clk
have similar behaviour with respect to process and temperature variation, the ratio
=
100
= 60 MHz); see Fig.6
---- -
R
1
V
i
+
I
=
j Ci
R
L
OB
I
and R
L
RB
V
V
V
V
V
V
V
V
V
=
) at T
CCO
CCO
CCO
CCO
CCO
CCO
CCO
CCO
CCO
----------------------------------------- -
R
OB
I
OT
L
CONDITIONS
= 2.7 V
= 3.3 V
= 2.7 V
= 3.3 V
= 2.7 V
= 3.3 V
= 3.3 V
= 3.3 V
= 3.3 V
amb
=
+
amb
as shown in Fig.4.
R
R
----------------------------------------- -
R
L
= 25 C.
L
10
= 25 C.
OB
+
V
RT
R
+
OT
R
RT
–
L
V
+
(reference voltage TOP) and the analog input which
RB
R
V
OT
RT
RT
–
and the full-scale input range at the converter,
4
0.2
V
RB
V
MIN.
RB
and its variation with temperature and
=
0. ˙ 8375
0.7
10
9
13
12
0.3
16
30
25
23
TYP.
V
2
14
13
17
16
10
20
34
30
27
RT
Product specification
–
MAX.
TDA8764A
V
RB
ns
ns
ns
ns
ns
ns
pF
V/ns
ns
ns
ns
ns
UNIT