adc161s626cimmx National Semiconductor Corporation, adc161s626cimmx Datasheet - Page 18

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adc161s626cimmx

Manufacturer Part Number
adc161s626cimmx
Description
16-bit, 50 To 250 Ksps, Differential Input, Micropower Adc
Manufacturer
National Semiconductor Corporation
Datasheet

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shunt reference families and the LM4120 and LM4140 series
reference families are excellent choices for a reference
source.
6.3 PCB Layout
Capacitive coupling between the noisy digital circuitry and the
sensitive analog circuitry can lead to poor performance. The
solution is to keep the analog circuitry separated from the
digital circuitry and the clock line as short as possible. Digital
circuits create substantial supply and ground current tran-
sients. The logic noise generated could have significant im-
pact upon system noise performance. To avoid performance
degradation of the ADC161S626 due to supply noise, avoid
using the same supply for the V
ADC161S626 that is used for digital circuitry on the board.
Generally, analog and digital lines should cross each other at
90° to avoid crosstalk. However, to maximize accuracy in high
resolution systems, avoid crossing analog and digital lines al-
together. It is important to keep clock lines as short as possi-
ble and isolated from ALL other lines, including other digital
lines. In addition, the clock line should also be treated as a
transmission line and be properly terminated. The analog in-
put should be isolated from noisy signal traces to avoid cou-
pling of spurious signals into the input. Any external
component (e.g., a filter capacitor) connected between the
converter's input pins and ground or to the reference input pin
and ground should be connected to a very clean point in the
ground plane.
A single, uniform ground plane and the use of split power
planes are recommended. The power planes should be lo-
7.2 Bridge Sensor Application
Figure 18 and Figure 19 show examples of interfacing bridge
sensors to the ADC161S626. The applications assume that
the bridge sensors require buffering and amplification to fully
utilize the dynamic range of the ADC and thus optimize the
performance of the entire signal path. The amplification
stages consist of the LMP7732 and the LMP7731, dual and
single precision amplifiers, and some gain setting passive
components. The amplification stages offer the benefit of high
input impedance and high amplification capability.
Figure 19, which has the amplification stage configured as an
instrumentation amplifier, has the added benefit of additional
common-mode rejection of common-mode noise or DC-volt-
ages coming from the bridge sensor. Depending on the volt-
age applied at V
application will convert the output voltage of a bridge sensor
CM
, the ADC161S626 in the single-ended
FIGURE 17. Low cost, low power Data Acquisition System
A
and V
REF
of the
18
cated within the same board layer. All analog circuitry (input
amplifiers, filters, reference components, etc.) should be
placed over the analog power plane. All digital circuitry should
be placed over the digital power plane. Furthermore, the GND
pins on the ADC161S626 and all the components in the ref-
erence circuitry and input signal chain that are connected to
ground should be connected to the ground plane at a quiet
point. Avoid connecting these points too close to the ground
point of a microprocessor, microcontroller, digital signal pro-
cessor, or other high power digital device.
7.0 APPLICATION CIRCUITS
The following figures are examples of the ADC161S626 in
typical application circuits. These circuits are basic and will
generally require modification for specific circumstances.
7.1 Data Acquisition
Figure 17 shows a typical connection diagram for the
ADC161S626 operating at V
2.5V shunt reference, the LM4020-2.5, to define the analog
input range of the ADC161S626 independent of supply vari-
ation on the +5V supply line. The V
coupled to the ground plane by a 0.1 µF ceramic capacitor
and a tantalum capacitor of 10 µF. It is important that the 0.1
µF capacitor be placed as close as possible to the V
while the placement of the tantalum capacitor is less critical.
It is also recommended that the V
ADC161S626 be de-coupled to ground by a 0.1 µF ceramic
capacitor in parallel with a 10 µF tantalum capacitor.
that contains both a positive and negative component or a
bridge sensor that only outputs a positive voltage. For the
case of a sensor with both positive and negative output ca-
pability, it is recommended that V
For a sensor that only outputs a positive voltage, V
need to be connected to ground. Both of these scenarios will
allow all the ADC output codes to be potentially utilized.
A separate power supply (V
bridge sensor but another option for biasing the bridge sensor
would be powering it from the +5V power supply. This option
has the benefit of providing the ideal common-mode input
voltage for the ADC161S626, while keeping design complex-
ity and cost to a minimum. However, any fluctuation in the +5V
supply will still be visible on the differential input to the ampli-
fication stage. The LM4120-4.1, a 4.1V series reference, and
the LM4120-2.5, a 2.5V series reference, are used as the ref-
30073463
BR
A
of +5V. V
) is assumed to be biasing the
CM
A
REF
be connected to V
REF
and V
pin should be de-
is connected to a
IO
pins of the
CM
REF
would
REF
pin
.

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