adc1175-50cilqx National Semiconductor Corporation, adc1175-50cilqx Datasheet - Page 14

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adc1175-50cilqx

Manufacturer Part Number
adc1175-50cilqx
Description
8-bit, 50 Msps, 125 Mw A/d Converter
Manufacturer
National Semiconductor Corporation
Datasheet
www.national.com
2.0 REFERENCE INPUTS
The reference inputs V
ence Bottom) are the top and bottom of the reference ladder.
Input signals between these two voltages will be digitized to
8 bits. External voltages applied to the reference input pins
should be within the range specified in the Operating Ratings
table (1.0V to AV
V
able to source sufficient current into the V
ficient current from the V
The reference ladder can be self-biased by connecting V
V
tom reference voltages of approximately 2.6V and 0.6V, re-
spectively, with V
Figure 3. If V
analog ground, a top reference voltage of approximately 2.3V
is generated. The top and bottom of the ladder should be by-
passed with 10 µF tantalum capacitors located close to the
reference pins.
The reference self-bias circuit of Figure 3 is very simple and
performance is adequate for many applications. Better lin-
earity performance can generally be achieved by driving the
reference pins with a low impedance source.
By forcing a little current into or out of the top and bottom of
the ladder, as shown in Figure 4, the top and bottom reference
voltages can be trimmed and performance improved over the
self-bias method of Figure 3. The resistive divider at the am-
plifier inputs can be replaced with potentiometers, if desired.
The LMC662 amplifier shown was chosen for its low offset
voltage and low cost. Note that a negative power supply is
FIGURE 4. Better Defining the ADC Reference Voltage. Self bias is still used, but the reference voltages are trimmed by
RB
RTS
). Any device used to drive the reference pins should be
and connecting the V
RT
and V
DD
CC
for V
= 5.0V. This connection is shown in
RTS
RT
RB
are tied together, but V
(Reference Top) and V
RB
RT
pin.
to V
and 0V to (AV
providing a small trim current with the operational amplifiers.
RBS
to provide top and bot-
RT
pin and sink suf-
DD
− 1.0V) for
RB
RB
is tied to
(Refer-
RT
to
14
needed for these amplifiers if the lower one is required to go
slightly negative to force the required reference voltage.
If reference voltages are desired that are more than a few tens
of millivolts from the self-bias values, the circuit of Figure 5
will allow forcing the reference voltages to whatever levels are
desired. This circuit provides the best performance because
of the low source impedance of the transistors. Note that the
V
To minimize noise effects and ensure accurate conversions,
the total reference voltage range (V
minimum of 1.0V and a maximum of about 2.8V.
The ADC1175-50 is designed to operate with top and bottom
references of 2.6V and 0.6V, respectively. However, it will
function with reduced performance with a top reference volt-
age as high as AV
as ground.
If reference voltages are desired that are more than a few tens
of millivolts from the self-bias values, the circuit of Figure 5
will allow forcing the reference voltages to whatever levels are
desired. This circuit provides the best performance because
of the low source impedance of the transistors. Note that the
V
V
supply voltage, and V
and 1.0V below V
accurate conversions, the total reference voltage range (V
- V
2.8V. If V
-5V points in Figure 5 can be returned to ground and the neg-
ative supply eliminated.
RTS
RTS
RT
RB
can be anywhere between V
) should be a minimum of 1.0V and a maximum of about
and V
and V
RB
RBS
RBS
is not required to be below about +700mV, the
pins are left floating.
pins are left floating.
RT
DD
. To minimize noise effects and ensure
and a bottom reference voltage as low
RB
can be anywhere between ground
RB
10089626
RT
+ 1.0V and the analog
− V
RB
) should be a
RT

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