adc12l032 National Semiconductor Corporation, adc12l032 Datasheet - Page 25

• Manufacturer Part Number: adc12l032
• Description: 3.3v Self-calibrating 12-bit Plus Sign Serial I/o A/d Converters With Mux And Sample/hold
• Manufacturer: National Semiconductor Corporation

Application Information
DO formats:
If erroneous SCLK pulses desynchronize the communica-
tions, the simplest way to recover is by cycling the power
supply to the device. Not being able to easily resynchronize
the device is a shortcoming of leaving CS low continuously.
The number of clock pulses required for an I/O exchange
may be different for the case when CS is left low continu-
ously vs. the case when CS is cycled. Take the I/O sequence
detailed in Figure 7 (Typical Power Supply Sequence) as an
example. The table below lists the number of SCLK pulses
required for each instruction:
1.4 Analog Input Channel Selection
The data input on DI also selects the channel configuration
for a particular A/D conversion (See Tables 2, 3, 4, 5). In
Figure 8 the only times when the channel configuration could
be modified would be during I/O sequences 1, 4, 5 and 6.
Input channels are reselected before the start of each new
conversion. Shown below is the data bit stream required on
DI, during I/O sequence number 4 in Figure 8, to set CH1 as
the positive input and CH0 as the negative input for the
different versions of ADCs:
1.5 Power Up/Down
The ADC may be powered down by taking the PD pin HIGH
or by the instruction input on DI (see Tables 5, 6, and the
Power Up/Down timing diagrams). When the ADC is pow-
ered down in this way, the A/D conversion circuitry is deac-
tivated, but the digital I/O circuitry is kept active. Hardware
power up/down is controlled by the state of the PD pin.
Software power up/down is controlled by the instruction
issued to the ADC. If a software power up instruction is
issued to the ADC while a hardware power down is in effect
Where X can be a logic high (H) or low (L).
12-Bit MSB or LSB First
16-Bit MSB or LSB first
Auto-Cal
Read Status
Read Status
12-Bit + Sign Conv 1
12-Bit + Sign Conv 2
ADC12L030
ADC12L032
ADC12L034
ADC12L038
8-Bit MSB or LSB First
Number
Part
Instruction
DO Format
DI0 DI1 DI2 DI3 DI4 DI5 DI6 DI7
L
L
L
L
H
H
H
H
Continuously
L
L
L
L
13 SCLKs
13 SCLKs
13 SCLKs
13 SCLKs
13 SCLKs
SIGN OFF
SIGN ON
SIGN OFF
SIGN ON
SIGN OFF
SIGN ON
CS Low
DI Data
L
L
L
L
H
H
L
L
(Continued)
H
L
L
L
CS Strobed
Number of
13 SCLKs
Expected
8 SCLKs
8 SCLKs
8 SCLKs
8 SCLKs
SCLKs
X
X
H
L
12
13
16
17
8
9
X
X
X
L
25
(PD pin high) the device will remain in the power-down state.
If a software power down instruction is issued to the ADC
while a hardware power up is in effect (PD pin low), the
device will power down. When the device is powered down
by software, it may be powered up by either issuing a
software power up instruction or by taking PD pin high and
then low. If the power down command is issued during an
A/D conversion, that conversion is disrupted. Therefore, the
data output after power up cannot be relied on.
1.6 User Mode and Test Mode
An instruction may be issued to the ADC to put it into test
mode, which is used by the manufacturer to verify complete
functionality of the device. During test mode CH0–CH7 be-
come active outputs. If the device is inadvertently put into the
test mode with CS low continuously, the serial communica-
tions may be desynchronized. Synchronization may be re-
gained by cycling the power supply voltage to the device.
Cycling the power supply voltage will also set the device into
user mode. If CS is used in the serial interface, the ADC may
be queried to see what mode it is in. This is done by issuing
a “read STATUS register” instruction to the ADC. When bit 9
of the status register is high the ADC is in test mode; when
bit 9 is low the ADC is in user mode. As an alternative to
cycling the power supply, an instruction sequence may be
used to return the device to user mode. This instruction
sequence must be issued to the ADC using CS. The follow-
ing table lists the instructions required to return the device to
user mode. Note that this entire sequence, including both
Test Mode and User Mode values, should be sent to recover
from the test mode.
1.7 Reading the Data Without Starting a Conversion
The data from a particular conversion may be accessed
without starting a new conversion by ensuring that the
CONV line is taken high during the I/O sequence. See the
Read Data timing diagrams. Table 6 describes the operation
of the CONV pin.
2.0 DESCRIPTION OF THE ANALOG MULTIPLEXER
For the ADC12L038, the analog input multiplexer can be
configured with 4 differential channels or 8 single ended
channels with the COM input as the zero reference or any
combination thereof (see Figure 9 ). The difference between
X = Don’t Care
Set DO with or
Set Acquisition
USER MODE
TEST MODE
without Sign
Instruction
Instructions
Conversion
Test Mode
Power Up
Start a
Reset
Time
DI0 DI1 DI2 DI3 DI4 DI5 DI6 DI7
or
or
or
H
H
H
H
L
L
L
L
L
L
L
L
or
or
H
H
X
L
L
L
L
L
L
L
L
or
H
X
L
L
L
L
L
L
L
L
DI Data
or
H
X
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
L
or
H
H
H
H
H
H
L
L
L
L
www.national.com
or
H
H
H
H
H
H
H
H
L
L
or
H
H
H
H
H
L
L
L
L
L