adc122s625eb National Semiconductor Corporation, adc122s625eb Datasheet - Page 3
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adc122s625eb
Manufacturer Part Number
adc122s625eb
Description
Adc122s625 Dual 12-bit, 50 Ksps To 200 Ksps, Simultaneous Sampling A/d Converter
Manufacturer
National Semiconductor Corporation
Datasheet
1.ADC122S625EB.pdf
(20 pages)
Pin Descriptions and Equivalent Circuits
Pin No.
10
1
2
3
4
5
6
7
8
9
Symbol
CHA+
CHA−
CHB−
CHB+
SCLK
GND
D
V
CS
V
REF
OUT
A
Voltage Reference Input. A voltage reference between 1V and V
input. V
µF. A bulk capacitor value of 1.0 µF to 10 µF in parallel with the 0.1 µF is recommended
for enhanced performance.
Non-Inverting Input for Channel A. CHA+ is the positive analog input for the differential
signal applied to Channel A.
Inverting Input for Channel A. CHA− is the negative analog input for the differential signal
applied to Channel A.
Inverting Input for Channel B. CHB− is the negative analog input for the differential signal
applied to Channel B.
Non-Inverting Input for Channel B. CHB+ is the positive analog input for the differential
signal applied to Channel B.
Ground. GND is the ground reference point for all signals applied to the ADC122S625.
Analog Power Supply input. A voltage source between 4.5V and 5.5V must be applied to
this input. V
µF. A bulk capacitor value of 1.0 µF to 10 µF in parallel with the 0.1 µF is recommended
for enhanced performance.
Serial Data Output for Channel A and Channel B. The serial data output word is comprised
of 4 null bits, 12 data bits (ChA conversion result), 4 null bits, and 12 data bits (ChB
conversion result). During a conversion, the data is output on the falling edges of SCLK
and is valid on the rising edges.
Serial Clock. SCLK is used to control data transfer and serves as the conversion clock.
Chip Select Bar. CS is active low. The ADC122S625 is actively converting when CS is
LOW and Power-Down Mode when CS is HIGH. A conversion begins on the fall of CS.
REF
must be decoupled to GND with a minimum ceramic capacitor value of 0.1
A
must be decoupled to GND with a minimum ceramic capacitor value of 0.1
3
Description
A
must be applied to this
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