adc12081civtx National Semiconductor Corporation, adc12081civtx Datasheet - Page 3

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adc12081civtx

Manufacturer Part Number
adc12081civtx
Description
12-bit, 5 Mhz Self-calibrating, Pipelined A/d Converter With Internal Sample & Hold
Manufacturer
National Semiconductor Corporation
Datasheet

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Part Number:
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Manufacturer:
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Pin Descriptions and Equivalent Circuits #2
No.
32
31
30
10
11
28
29
2
1
8
7
Symbol
CLOCK
READY
V
CAL
V
V
V
OR
V
PD
OE
REF
RM
RP
RN
IN
Equivalent Circuit
3
Analog signal input. With a 2.0V reference voltage,
input signal voltages in the range of 0 to 2.0 Volts
will be converted. See section 1.2.
Reference voltage input. This pin should be driven
from an accurate, stable reference source in the
range of 1.8 to 2.2V and bypassed to a low-noise
analog ground with a monolithic ceramic capacitor,
nominally 0.01µF. See section 1.1.
Positive reference bypass pin. Bypass with a 0.1µF
capacitor. Do not connect anything else to this pin.
See section 3.1
Reference midpoint bypass pin. Bypass with a 0.1µF
capacitor. Do not connect anything else to this pin.
See section 3.1
Negative reverence bypass pin. Bypass with a 0.1µF
capacitor. Do not connect anything else to this pin.
See section 3.1
Sample Clock input, TTL compatible. Maximum
amplitude should not exceed 3V.
Calibration request, active High. Calibration cycle
starts when CAL returns to logic low. CAL is ignored
during power-down mode. See section 2.2.
Power-down, active High, ignored during calibration
cycle. See paragraph 2.4
Output enable control, active low. When this pin is
high the data outputs are in Tri-state
(high-impedance) mode.
Over range indicator. This pin is at a logic High for
V
Device ready indicator, active High. This pin is at a
logic Low during a calibration cycle and while the
device is in the power down mode.
IN
<
0 or for V
IN
>
Description
V
REF
.
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