adc12081civtx National Semiconductor Corporation, adc12081civtx Datasheet - Page 14
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adc12081civtx
Manufacturer Part Number
adc12081civtx
Description
12-bit, 5 Mhz Self-calibrating, Pipelined A/d Converter With Internal Sample & Hold
Manufacturer
National Semiconductor Corporation
Datasheet
1.ADC12081CIVTX.pdf
(17 pages)
Available stocks
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Part Number
Manufacturer
Quantity
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Company:
Part Number:
adc12081civtx/NOPB
Manufacturer:
Texas Instruments
Quantity:
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Applications Information
5.0 LAYOUT AND GROUNDING
Proper grounding and routing of all signals is essential to
ensure accurate conversion. Separate analog and digital
ground planes that are connected beneath the ADC12081
are required to achieve specified performance. The analog
and digital grounds may be in the same layer, but should be
separated from each other and should never overlap each
other. Separation should be at least 1/8 inch, where pos-
sible.
The ground return for the output buffer digital supply (DGND
I/O) carries the ground current for the output drivers. This pin
should be connected to the system digital ground. The cur-
rent on this pin can exhibit high transients that could add
noise to the conversion process. To prevent this from hap-
pening, the DGND I/O pin should NOT be connected in close
proximity to any of the ADC12081’s other ground pins. See .
Capacitive coupling between the typically noisy digital
ground plane and the sensitive analog circuitry can lead to
poor performance that may seem impossible to isolate and
remedy. The solution is to keep the analog circuitry sepa-
rated from the digital circuitry and from the digital ground
plane.
Digital circuits create substantial supply and ground current
transients. The logic noise thus generated could have sig-
nificant impact upon system noise performance. The best
FIGURE 5. Basic Connections Diagram
(Continued)
14
logic family to use in systems with A/D converters is one
which employs non-saturating transistor designs, or has low
noise characteristics, such as the 74LS, 74HC(T) and 74
AC(T)Q families. The worst noise generators are logic fami-
lies that draw the largest supply current transients during
clock or signal edges, like the 74F and the 74AC(T) families.
Since digital switching transients are composed largely of
high frequency components, total ground plane copper
weight will have little effect upon the logic-generated noise.
This is because of the skin effect. Total surface area is more
important than is total ground plane volume.
An effective way to control ground noise is by connecting the
analog and digital ground planes together beneath the ADC
with a copper trace that is very narrow compared with the
rest of the ground plane. This narrowing beneath the con-
verter provides a fairly high impedance to the high frequency
components of the digital switching currents, directing them
away from the analog pins. The relatively lower frequency
analog ground currents do not create a significant voltage
drop across the impedance of this narrow ground connec-
tion.
To maximize accuracy in high speed, high resolution sys-
tems, avoid crossing analog and digital signal traces. It is
important to keep any clock lines isolated from ALL other
lines. Even the generally accepted 90 degree crossing
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