adc1212d NXP Semiconductors, adc1212d Datasheet - Page 18

• Manufacturer Part Number: adc1212d
• Description: Adc1212d Series Dual 12-bit Adc; 65 Msps, 80 Msps, 105 Msps Or 125 Msps; Cmos Or Lvds Ddr Digital Outputs
• Manufacturer: NXP Semiconductors

NXP Semiconductors
ADC1212D_SER
Product data sheet
11.1.4
11.2.1 Input stage
11.2.2 Anti-kickback circuitry
11.2 Analog inputs
Selecting the output data format
The output data format can be selected via the SPI interface (offset binary,
two’s complement or gray code; see
(offset binary or two’s complement). Offset binary is selected when DFS is LOW. When
DFS is HIGH, two’s complement is selected.
The analog input of the ADC1212D supports a differential or a single-ended input drive.
Optimal performance is achieved using differential inputs with the common-mode input
voltage (V
The full-scale analog input voltage range is configurable between 1 V (p-p) and 2 V (p-p)
via a programmable internal reference (see
The equivalent circuit of the sample-and-hold input stage, including ElectroStatic
Discharge (ESD) protection and circuit and package parasitics, is shown in
The sample phase occurs when the internal clock (derived from the clock signal on pin
CLKP/CLKM) is HIGH. The voltage is then held on the sampling capacitors. When the
clock signal goes LOW, the stage enters the hold phase and the voltage information is
transmitted to the ADC core.
Anti-kickback circuitry (RC filter in
injection generated by the sampling capacitance.
The RC filter is also used to filter noise from the signal before it reaches the sampling
stage. The value of the capacitor should be chosen to maximize noise attenuation without
degrading the settling time excessively.
Fig 16. Input sampling circuit
INAM/INBM
I(cm)
INAP/INBP
) on pins INAP, INAM, INBP and INBM set to 0.5V
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 4 March 2011
Package
Dual 12-bit ADC: CMOS or LVDS DDR digital outputs
Figure 17
Table
ESD
24) or by using pin DFS in Pin control mode
Section 11.3
is needed to counteract the effects of charge
Parasitics
ADC1212D series
and
R on = 14 Ω
R on = 14 Ω
internal
internal
Switch
Switch
clock
clock
Table
DDA
Sampling
Sampling
capacitor
capacitor
23).
.
4 pF
4 pF
© NXP B.V. 2011. All rights reserved.
005aaa092
Figure
16.
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