adc1210s125hn/c1 NXP Semiconductors, adc1210s125hn/c1 Datasheet - Page 7

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adc1210s125hn/c1

Manufacturer Part Number
adc1210s125hn/c1
Description
Single 12-bit Adc; 65 Msps, 80 Msps, 105 Msps Or 125 Msps; Cmos Or Lvds Ddr Digital Outputs
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
Table 6.
[1]
ADC1210S_SER_1
Preliminary data sheet
Symbol
Digital outputs, CMOS mode: pins D11 to D0, OTR, DAV
Output levels, V
V
V
I
I
C
Output levels, V
V
V
Digital outputs, LVDS mode: pins D11P to D0P, D11M to D0M, DAVP and DAVM
Output levels, V
V
V
C
Analog inputs: pins INP and INM
I
R
C
V
B
V
Common mode output voltage: pin VCM
V
I
I/O reference voltage: pin VREF
V
Accuracy
INL
DNL
E
E
Supply
PSRR
OL
OH
I
O(cm)
OL
OH
OL
OH
O(offset)
O(dif)
I(cm)
i
I(dif)
O(cm)
VREF
offset
G
O
O
I
I
Typical values measured at V
temperature range T
CMOS and LVDS interface; unless otherwise specified.
Static characteristics
DDO
DDO
DDO
Parameter
LOW-level output voltage
HIGH-level output voltage
LOW-level output current
HIGH-level output current
output capacitance
LOW-level output voltage
HIGH-level output voltage
output offset voltage
differential output voltage
output capacitance
input current
input resistance
input capacitance
common-mode input voltage
input bandwidth
differential input voltage
common-mode output voltage
common-mode output current
voltage on pin VREF
integral non-linearity
differential non-linearity
offset error
gain error
power supply rejection ratio
= 3 V
= 1.8 V
= 3 V only, R
amb
= −40 °C to +85 °C at V
DDA
L
= 3 V, V
[1]
= 100 Ω
…continued
DDO
All information provided in this document is subject to legal disclaimers.
= 1.8 V, T
DDA
Conditions
I
I
3-state; output level = 0 V
3-state; output level = V
high impedance; OE = HIGH
I
I
output buffer current set to
3.5 mA
output buffer current set to
3.5 mA
V
peak-to-peak
output
input
guaranteed no missing codes
full-scale
100 mV (p-p) on V
= 3 V, V
OL
OH
OL
OH
Rev. 01 — 9 April 2010
INP
amb
= <tbd>
= <tbd>
= <tbd>
= <tbd>
= V
= 25 °C and C
DDO
INM
ADC1210S series; CMOS or LVDS DDR digital outputs
= 1.8 V; V
DDA
L
INP
= 5 pF; minimum and maximum values are across the full
− V
DDA
INM
= −1 dBFS; internal reference mode; applied to
ADC1210S series
OGND
OGND
-
-
-
1
-
-
0.5
0.5
-
Min
0.8V
-
-
-
0.8V
-
-
−5
-
0.9
−1.25
−0.25
-
DDO
DDO
Typ
-
-
<tbd>
<tbd>
3
-
-
1.2
350
<tbd>
-
<tbd>
5
1.5
600
V
<tbd>
-
-
±0.25
±0.12
±2
±0.5
35
DDA
/ 2 -
© NXP B.V. 2010. All rights reserved.
Max
0.2V
V
-
-
-
0.2V
V
-
-
-
+5
-
-
2
-
2
-
1
1
+1.25
+0.25
-
-
DDO
DDO
DDO
DDO
Unit
V
V
μA
μA
pF
V
V
V
mV
pF
μA
Ω
pF
V
MHz
V
V
μA
V
V
LSB
LSB
mV
%
dBc
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