maxq1004 Maxim Integrated Products, Inc., maxq1004 Datasheet - Page 9

• Manufacturer Part Number: maxq1004
• Description: 1-wire And Spi Authentication Microcontroller
• Manufacturer: Maxim Integrated Products, Inc.

1-Wire and SPI Authentication Microcontroller
3–10
PIN
2
MOSI, MISO,
SCLK, SSEL,
INT0–INT7,
P0.0–P0.7,
TMS, TDO
TCK, TDI,
NAME
DQ
RANDOM-NUMBER
AES ENCRYPTION
GENERATOR
REFERENCE
10-BIT ADC
General-Purpose, Digital I/O, Type D Port/SPI Interface/JTAG Interface/External Edge-
Selectable Interrupt. This port functions as 8-bit I/O and as an alternate interface to external
interrupts. Each interrupt can be individually enabled and the active edge can be selected.
The default reset condition of the pins is as a weak pullup input. To drive port 0 as output, the
port direction register must be programmed to enable output. P0.7–P0.4 default to their JTAG
function on any reset.
1-Wire Slave Interface, I/O. This 5V tolerant, open-drain I/O pin serves as both transmit and
receive pin for the 1-Wire interface. The DQ pin requires an external pullup resistor, the value
of which is determined by the speed mode.
INTERNAL
SENSOR
ENGINE
PIN
TEMP
10
3
4
5
6
7
8
9
PORT
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
GENERAL-PURPOSE I/O PINS
OSCILLATOR
INTERNAL
6MHz
16KB FLASH MEMORY
WATCHDOG TIMER
640B DATA SRAM
4KB UTILITY ROM
INTERRUPT
EXTERNAL
MAXQ RISC
INT0
INT1
INT2
INT3
INT4
INT5
INT6
INT7
CPU
GND +1.7V TO +3.6V
MONITOR
VOLTAGE
FUNCTION
MOSI: Master Out-Slave In (SPI)
MISO: Master In-Slave Out (SPI)
SCLK: Slave Clock (SPI)
SSEL: Active-Low Slave Select (SPI)
TCK: Test Clock (JTAG)/T0
TDI: Test Data In (JTAG)/T0G
TMS: Test Mode Select (JTAG)
TDO: Test Data Out (JTAG)
Pin Description (continued)
MAXQ1004
INTERFACE
(UP TO 8)
TIMER 0
1-Wire
JTAG
GPIO
SPI
SPECIAL FUNCTION
Block Diagram
9