maxq3100-emn Maxim Integrated Products, Inc., maxq3100-emn Datasheet - Page 21

• Manufacturer Part Number: maxq3100-emn
• Description: Maxq3100 Mixed-signal Microcontroller With Analog Comparators, Lcd, And Rtc
• Manufacturer: Maxim Integrated Products, Inc.

Power consumption reaches its minimum in stop mode.
In this mode, the system clock and all code execution
is halted. Upon receiving one of the following enabled
events, the device executes a 250ms warmup delay
and then begins normal operation from the point in the
code following the setting of the STOP bit:
• An enabled external interrupt pin is triggered.
• An enabled comparator interrupt is triggered.
• An external reset signal is applied to the RESET pin.
• The RTC time-of-day or subsecond alarms are
The following peripherals can be enabled during stop
mode:
• Analog comparators
• RTC
• LCD controller
Multiple interrupt sources are available for quick
response to internal and external events. The MAXQ
architecture uses a single interrupt vector (IV), single
interrupt-service routine (ISR) design. For maximum
flexibility, interrupts can be enabled globally, individual-
ly, or by module. When an interrupt condition occurs,
its individual flag is set, even if the interrupt source is
disabled at the local, module, or global level. Interrupt
flags must be cleared within the user-interrupt routine
to avoid repeated interrupts from the same source.
Application software must ensure a delay between the
write to the flag and the RETI instruction to allow time
for the interrupt hardware to remove the internal inter-
rupt condition. Asynchronous interrupt flags require a
one-instruction delay, and synchronous interrupt flags
require a two-instruction delay.
When an enabled interrupt is detected, software jumps
to a user-programmable interrupt vector location. The
IV register defaults to 0000h on reset or power-up, so if
it is not changed to a different address, the user pro-
gram must determine whether a jump to 0000h came
from a reset or interrupt source.
Once software control has been transferred to the ISR,
the interrupt identification register (IIR) can determine if
a system register or peripheral register was the source
of the interrupt. The specified module can then be inter-
rogated for the specific interrupt source and software
can take appropriate action. Because the interrupts are
evaluated by user software, the user can define a
unique interrupt priority scheme for each application.
The following interrupt sources are available.
activated.
Mixed-Signal Microcontroller with Analog
______________________________________________________________________________________
Interrupts
Comparators, LCD, and RTC
• Watchdog Interrupt
• External Interrupts 0 to 11
• Analog Comparator 0 and 1 Interrupts
• Temperature Sensor Interrupt
• RTC Time-of-Day and Subsecond Alarms
• Serial Port 0 Receive and Transmit Interrupts
• Serial Port 1 Receive and Transmit Interrupts
• Timer 0 Overflow Interrupt
• Timer 1 Overflow and External Trigger Interrupts
• Timer 2 Low Compare, Low Overflow, Capture/
Several reset sources are provided for microcontroller
control. Although code execution is halted in the reset
state, the high-frequency oscillator continues to oscillate.
An internal power-on reset circuit enhances system reli-
ability. This circuit forces the device to perform a
power-on reset whenever a rising voltage on DV
climbs above approximately V
device performs a brownout reset whenever DV
drops below V
abled in stop mode. The following events occur during
a power-on reset:
• All registers and circuits enter their power-on reset
• I/O pins revert to their reset state, with logic one
• The power-on reset flag is set to indicate the source
• Code execution begins at location 8000h following a
The watchdog timer functions are described in the
MAXQ Family User’s Guide . Software can determine if
a reset was caused by a watchdog timeout by check-
ing the watchdog timer reset flag (WTRF) in the WDCN
register. Execution resumes at location 8000h following
a watchdog timer reset.
Asserting the external RESET pin low causes the
device to enter the reset state. The external reset func-
tions as described in the MAXQ Family User’s Guide .
Execution resumes at location 8000h after the RESET
pin is released.
Compare, and Overflow Interrupts
state.
states tracking DV
of the reset.
2-second 32.768kHz warmup.
Power-On Reset/Brownout Reset
RST
, a feature that can be optionally dis-
DD
.
External System Reset
Watchdog Timer Reset
Reset Sources
RST
. Additionally, the
DD
DD
21