ADN8810-EVAL Analog Devices, ADN8810-EVAL Datasheet - Page 13

• Manufacturer Part Number: ADN8810-EVAL
• Description: 12-bit High Output Current Source
• Manufacturer: Analog Devices

Set the gain of the dither by adjusting the ratio of R2 to R1.
Increase C to lower the cutoff frequency of the high-pass filter
created by C and R1. The cutoff frequency of Figure 19 is
approximately 10 Hz.
The AD8605 is recommended as a low offset, rail-to-rail input
amplifier for this circuit.
DRIVING COMMON-ANODE LASER DIODES
The ADN8810 can power common-anode laser diodes. These
are laser diodes whose anodes are fixed to the laser module
case. The module case is typically tied to either VDD or ground.
For common-anode-to-ground applications, a negative 5 V
supply must be provided.
In Figure 20, R
where Code is an integer value from 0 to 4,095. Using the values
in Figure 20, the diode current is 300.7 mA at a code value of
2,045 (0 x 7FF), or one-half full-scale. This effectively provides
11-bit current control from 0 mA to 300 mA of diode current.
The maximum output current of this configuration is limited by
the compliance voltage at the IOUT pin of the ADN8810. The
voltage at IOUT cannot exceed 1 V below PVDD, in this case
4 V. The IOUT voltage is equal to the voltage drop across R
the gate-to-source voltage of the external FET. For this reason,
select a FET with a low threshold voltage.
In addition, the voltage across the R
voltage at the cathode of the laser diode. Given a forward laser
diode voltage drop of 2 V in Figure 20, the voltage at the R
(I × R
of Code in Equation 5.
Although the configuration for anode-to-ground diodes is
similar, the supply voltages must be shifted down to 0 V and
–5 V, as shown in Figure. The AVDD, DVDD, and PVDD pins
are connected to ground with AVSS connected to –5 V. The
4.096 V reference must also be referred to the –5 V supply
voltage. The diode current is still determined by Equation 5.
All logic levels must be shifted down to 0 V and –5 V levels as
well. This includes RESET , CS , SCLK, SDI, SB , and all ADDR
I
=
. 4
096
S
) cannot exceed 3 V. This sets an upper limit to the value
DITHER
×
1
Figure 19. Adding Dither to the Reference Voltage
1 .
⎛
⎜
⎜
⎝
S
R
sets up the diode current by the equation
1
S
1µF
4.096V
C
+
16
1.62kΩ
1
5 .
R1
k
⎞
× ⎟ ⎟
⎠
Code
4096
1.62kΩ
5V
R2
S
resistor cannot exceed the
AD8605
TO V
REF
(5)
SN
S
plus
pin
Rev. 0 | Page 13 of 16
pins. Figure shows a simple method to level shift a standard
TTL or CMOS (0 V to 5 V) signal down using external FETs.
PC BOARD LAYOUT RECOMMENDATIONS
Although they can be driven from the same power supply
voltage, keep DVDD and AVDD current paths separate on the
PC board to maintain the highest accuracy; likewise for AVSS
and DGND. Tie common potentials together at a single point
located near the power regulator. This technique is known as
star grounding and is shown in Figure. This method reduces
digital crosstalk into the laser diode or load.
5V
Figure 21. Driving Common-Anode-to-Ground Laser Diodes with a Negative
VIN
VIN
ADR292
ADR292
GND
GND
–5V
Figure 20. Driving Common-Anode-to-VDD Laser Diodes
TTL/CMOS
VOUT
VOUT
LEVEL
Figure 22. Level Shifting TTL/CMOS Logic
3
3
ENCOMP
VREF
RESET
CS
SCLK
SDI
ADDR0-2
ENCOMP
VREF
RESET
CS
SCLK
SDI
ADDR0-2
+3V
–5V
–5V
10kΩ
SB
SB
NDC7003P
OR EQUIV
ADN8810
ADN8810
DVDD
AVSS
DVDD
AVSS
Supply
NOTE: LEAVE FB WITH NO CONNECTION
NOTE: LEAVE FB WITH NO CONNECTION
–5V
AVDD
DVSS
AVDD
DVSS
–5V
5V
100kΩ
NDC7002N
OR EQUIV
PVDD
DGND
PVDD
DGND
IOUT
IOUT
R
R
FB
SN
FB
SN
TO:
NC
NC
RESET
CS
SCLK
SDI
5V
–5V
ADN8810
R
6.81Ω
FDC633N
OR EQUIV
R
6.81Ω
D1
FDC633N
OR EQUIV
S
D1
I = 300mA
@ CODE 0x7F
S
I = 300mA
@ CODE 0x7F