m48t512y STMicroelectronics, m48t512y Datasheet - Page 6

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m48t512y

Manufacturer Part Number
m48t512y
Description
5.0 Or 3.3v, 4 Mbit 512 Kbit X 8 Timekeeper Sram
Manufacturer
STMicroelectronics
Datasheet

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M48T512Y, M48T512V*
OPERATING MODES
The 32-pin, 600mil DIP Hybrid houses a controller
chip, SRAM, quartz crystal, and a long life lithium
button
11., page 15
and the quartz controlled clock oscillator. The
clock locations contain the year, month, date, day,
hour, minute, and second in 24 hour BCD format.
Corrections for 28, 29 (leap year - compliant until
the year 2100), 30, and 31 day months are made
automatically. Byte 7FFF8h is the clock control
register (see
user access to the clock information and also
stores the clock calibration setting. The seven
clock bytes (7FFFFh-7FFF9h) are not the actual
clock counters, they are memory locations consist-
ing of BiPORT™ READ/WRITE memory cells
Table 2. Operating Modes
Note: X = V
6/21
Deselect
WRITE
READ
READ
Deselect
Deselect
Mode
1. See
cell
IH
Table 10., page 17
or V
Table 5., page
illustrates the static memory array
IL
in
; V
V
SO
SO
a
= Battery Back-up Switchover Voltage.
4.5 to 5.5V
3.0 to 3.6V
to V
single
V
V
PFD
or
for details.
SO
CC
(1)
11). This byte controls
(min)
package.
(1)
Figure
V
V
V
V
E
X
X
IH
IL
IL
IL
V
V
G
X
X
X
X
IH
within the static RAM array. The M48T512Y/V in-
cludes a clock control circuit which updates the
clock bytes with current information once per sec-
ond. The information can be accessed by the user
in the same manner as any other location in the
static memory array. The M48T512Y/V also has its
own Power-Fail Detect circuit. This control circuitry
constantly monitors the supply voltage for an out
of tolerance condition. When V
ance, the circuit write protects the TIMEKEEPER
register data and SRAM, providing data security in
the midst of unpredictable system operation. As
V
es to the battery, maintaining data and clock oper-
ation until valid power is restored.
IL
CC
falls, the control circuitry automatically switch-
V
V
V
W
X
X
X
IH
IH
IL
DQ0-DQ7
High Z
High Z
High Z
High Z
D
D
OUT
IN
Battery Back-up Mode
CMOS Standby
CC
Standby
Power
Active
Active
Active
is out of toler-

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