pca8576c NXP Semiconductors, pca8576c Datasheet - Page 16

• Manufacturer Part Number: pca8576c
• Description: Universal Lcd Driver For Low Multiplex Rates
• Manufacturer: NXP Semiconductors

NXP Semiconductors
PCA8576C
Product data sheet
The display RAM bit map
backplane outputs BP0 to BP3, and the columns 0 to 39 which correspond with the
segment outputs S0 to S39. In multiplexed LCD applications the segment data of the first,
second, third and fourth row of the display RAM are time-multiplexed with BP0, BP1, BP2,
and BP3 respectively.
When display data is transmitted to the PCA8576C, the display bytes received are stored
in the display RAM in accordance with the selected LCD drive mode. The data is stored as
it arrives and does not wait for an acknowledge cycle as with the commands. Depending
on the current multiplex drive mode, data is stored singularly, in pairs, triples or
quadruples. To illustrate the filling order, an example of a 7-segment numeric display
showing all drive modes is given in
applies equally to other LCD types.
Fig 10. Display RAM bit map
backplane outputs
display RAM bits
The display RAM bitmap shows the direct relationship between the display RAM column and the
segment outputs; and between the bits in a RAM row and the backplane outputs.
(rows)/
(BP)
All information provided in this document is subject to legal disclaimers.
0
1
2
3
Rev. 1 — 22 July 2010
0
Figure 10
1
2
display RAM addresses (columns)/segment outputs (S)
Figure
3
shows the rows 0 to 3 which correspond with the
4
Universal LCD driver for low multiplex rates
11; the RAM filling organization depicted
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PCA8576C
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© NXP B.V. 2010. All rights reserved.
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mbe525
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