pcf8813 NXP Semiconductors, pcf8813 Datasheet - Page 6

• Manufacturer Part Number: pcf8813
• Description: 67 + 1 X 102 Pixels Matrix Lcd Driver
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Notes
1. Dummy pads are located at positions 1, 2, 3, 5, 6, 179, 180, 181, 182 and 274; dummy and alignment pads are
2. When not in use, this pad must be connected to V
3. Output SDAHOUT is used as the data acknowledge output when the I
4. V
5. This pad can be used to tie-off unused input pads to the power supply voltage or to ground.
6. This input is not used in serial and I
7. This input is not used when the serial or I
8. When serial or I
9. Supply rails V
10. This input is not used with the 3-line serial interface and must therefore be connected to V
11. This pad can be connected externally to the SCE/SCLH pad to reduce the number of pads routed in COG
12. When the on-chip oscillator is used, the OSC input must be connected to V
13. Test pads T1 to T5 are not accessible to users: T1, T2 and T5 must be connected to V
14. Positive power supply for the liquid crystal display (see also Figs 51, 52 and 53):
2004 Mar 05
V
V
V
RES
LCDIN
LCDOUT
LCDSENSE
(67 + 1)
SYMBOL
located at positions 4 and 178.
to SDAH externally, the SDAH line becomes fully I
from the serial data line is advantageous in COG applications because where the track resistance from the
SDAHOUT pad to the SDAH line can be significant, a potential divider is generated by the bus pull-up resistor and
the ITO track resistance. Therefore it is possible during the acknowledge cycle that the PCF8813 will not create a
logic LOW level. By splitting the SDAH input from the SDAHOUT output, the device could be used in a mode that
ignores the acknowledge bit. In COG applications where the acknowledge cycle is required, it is necessary to
minimize the track resistance from the SDAHOUT pad to the system SDAH line to guarantee a valid LOW level.
outside of the chip; V
then care must be taken with respect to the supply voltage range. If the internal voltage generator is not used, pads
V
V
applications. When not connected in this configuration, V
completion of OTP programming and after the seal bit has been set.
then this is connected to the OSC input. If both the oscillator and external clock are inhibited by connecting pad OSC
to V
Power-down mode before stopping the clock.
open-circuit.
a) If the internal voltage generator is used, pads V
b) An external LCD supply voltage can be supplied using the V
DD2
DD2
SS1
open-circuit, pad V
In Power-down mode, the external LCD supply voltage must be switched off.
SS1
.
and V
and V
, the display is not clocked and may be in a DC state. To avoid this, the chip should always be put into
DD3
DD3
SS1
102 pixels matrix LCD driver
supply the internal voltage generator, both have the same voltage and may be connected together
must be connected to pads V
2
256 to 262
263 to 271
C-bus mode is selected, the unused parallel pads must be connected to V
and V
PAD
272
273
DD1
LCDSENSE
(1)
SS2
supplies the remainder of the chip. V
must be connected together.
external reset input
LCD supply voltage input; note 14
generated LCD supply voltage; note 14
voltage multiplier (V
is connected to the V
2
C-bus mode and must therefore be connected to either V
2
C-bus interface is selected and must therefore be connected to V
DD1
.
DD1
2
LCD
LCDIN
C-bus compatible. Having the acknowledge output separated
LCDIN
) regulation input; note 14
or V
6
, V
OTPPROG
SS1
LCDSENSE
input, and the internal voltage generator is switched off.
.
DD1
LCDIN
DESCRIPTION
, V
must be connected to either V
DD2
and V
2
pad, this requires that pad V
C-bus is selected. By connecting SDAHOUT
and V
LCDOUT
DD1
DD3
. If an external clock signal is used,
can be connected together but
must be connected together.
SS
; T3 and T4 must be
DD1
DD1
DD1
or V
Product specification
or V
DD1
or V
LCDOUT
PCF8813
SS1
SS1
or V
.
SS1
.
SS1
.
is
DD1
after
or