pcf8558 NXP Semiconductors, pcf8558 Datasheet - Page 10

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pcf8558

Manufacturer Part Number
pcf8558
Description
Universal Lcd Driver For Small Graphic Panels
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
COMMANDS
Display Control
Table 2 Display status
PD: P
Set Address
Table 3 Y0, Y1 and Y2 define the Y address vector
Table 4 Instructions: control byte, address
1998 Apr 07
PD
V
Blank
Normal
All segments on
Inverse video
Display control
X address
All LCD outputs at V
Bias generator off
Power-on reset on, oscillator off (external clock still
possible)
V
I
power-down mode.
Universal LCD driver for small graphic
panels
2
BIT
INSTRUCTION
LCD
C-bus, RAM, commands, etc. still function in
Y2
OWER
0
0
0
0
1
DISPLAY STATUS
can be disconnected
address of the display RAM
normal
horizontal addressing
-D
OWN
LOGIC 0
Y1
0
0
1
1
0
DD
DB7
0
0
(display off)
DB6
E
power-down
vertical addressing
Y0
0
1
0
1
0
DB5
E
D
0
1
1
0
LOGIC 1
BITS
DB4
PD
LINE
X address
0
1
2
3
4
D
0
1
0
1
DB3
V
10
DB2
Y2
Set X address
The X address points to the columns. The range of X is
0 to 100 (64H).
Reset function
After power-on the chip has the following state:
Note
If the chip is used with an external clock source, after
power-on, the chip requires at least 2 clock pulses to
ensure that an internal synchronous reset is carried out.
After the internal reset, the chip goes into power-down
mode (PD = 1). If the clock pulses are not supplied, and
the reset is not cleared, the chip cannot respond to
commands in the I
In applications where the internal oscillator is used
(pin OSC = V
As soon as the synchronous reset is cleared, the chip goes
into power-down mode, and the oscillator is stopped.
Power-down mode (PD = 1)
RAM undefined
RAM X and Y address undefined
Display control bits (except PD) undefined
I
2
C-bus interface reset.
DB1
Y1
DB0
Y0
DD
), the oscillator starts after power-on.
2
Y address vector, display control
set column address
C bus.
DESCRIPTION
Objective specification
PCF8558

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