pcf2119x-2 NXP Semiconductors, pcf2119x-2 Datasheet - Page 19
pcf2119x-2
Manufacturer Part Number
pcf2119x-2
Description
Controllers/drivers
Manufacturer
NXP Semiconductors
Datasheet
1.PCF2119X-2.pdf
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Philips Semiconductors
8
Only two PCF2119x registers, the Instruction Register (IR)
and the Data Register (DR) can be directly controlled by
the MPU. Before internal operation, control information is
stored temporarily in these registers, to allow interfacing to
various types of MPUs which operate at different speeds
or to allow interface to peripheral control ICs.
The PCF2119x operation is controlled by the instructions
shown in Table 6 together with their execution time.
Details are explained in subsequent sections.
Instructions are of 4 types, those that:
1. Designate PCF2119x functions such as display
2. Set internal RAM addresses
3. Perform data transfer with internal RAM
4. Others.
Table 5 Instruction set for I
Note
1. R/W is set together with the slave address.
28. August 2000
Co RS 0
LCD controllers/drivers
format, data length, etc.
INSTRUCTIONS
CONTROL BYTE
0
0
0
2
C-bus commands
0
0
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 note 1
COMMAND BYTE
19
In normal use, category 3 instructions are used most
frequently. However, automatic incrementing by 1
(or decrementing by 1) of internal RAM addresses after
each data write lessens the MPU program load.
The display shift in particular can be performed
concurrently with display data write, enabling the designer
to develop systems in minimum time with maximum
programming efficiency.
During internal operation, no instructions other than the
‘read busy flag’ and ‘read address’ instructions will be
executed. Because the busy flag is set to a logic 1 while an
instruction is being executed, check to ensure it is a logic 0
before sending the next instruction or wait for the
maximum instruction execution time, as given in Table 6.
An instruction sent while the busy flag is logic 1 will not be
executed.
I
2
C-BUS COMMANDS
PCF2119x-2
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