74lv02bq NXP Semiconductors, 74lv02bq Datasheet - Page 2
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74lv02bq
Manufacturer Part Number
74lv02bq
Description
Quad 2-input Nor Gate
Manufacturer
NXP Semiconductors
Datasheet
1.74LV02BQ.pdf
(12 pages)
NXP Semiconductors
4. Functional diagram
5. Pinning information
Table 2.
74LV02_4
Product data sheet
Symbol
1Y
1A
1B
Fig 1. Logic symbol
Fig 4. Pin configuration SO14 and TSSOP14
11
12
2
3
5
6
8
9
Pin description
GND
1A
1B
2A
2B
3A
3B
4A
4B
1Y
1A
1B
2Y
2A
2B
5.1 Pinning
5.2 Pin description
1
2
3
4
5
6
7
mna216
1Y
2Y
3Y
4Y
Pin
1
2
3
13
10
1
4
02
001aac919
14
13
12
11
10
9
8
Fig 2. IEC logic symbol
V
4Y
4B
4A
3Y
3B
3A
CC
Rev. 04 — 20 December 2007
11
12
2
3
5
6
8
9
Description
data output
data input
data input
001aah084
1
1
1
1
Fig 5. Pin configuration DHVQFN14
10
13
(1) The die substrate is attached to this pad using
1
4
conductive die attach material. It can not be used as
a supply pin or input.
index area
terminal 1
1A
1B
2Y
2A
2B
Fig 3. Logic diagram for one gate
Transparent top view
2
3
4
5
6
A
B
74LV02
V
CC
(1)
Quad 2-input NOR gate
13
12
11
10
9
001aah093
© NXP B.V. 2007. All rights reserved.
4Y
4B
4A
3Y
3B
74LV02
mna215
2 of 12
Y