74lvth32373gx Fairchild Semiconductor, 74lvth32373gx Datasheet

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74lvth32373gx

Manufacturer Part Number
74lvth32373gx
Description
Low Voltage 32-bit Transparent Latch With 3-state Outputs Preliminary
Manufacturer
Fairchild Semiconductor
Datasheet
© 2001 Fairchild Semiconductor Corporation
74LVT32373GX
(Note 1)
74LVTH32373GX
(Note 1)
74LVT32373 • 74LVTH32373
Low Voltage 32-Bit Transparent Latch
with 3-STATE Outputs (Preliminary)
General Description
The LVT32373 and LVTH32373 contain thirty-two non-
inverting latches with 3-STATE outputs and are intended
for bus oriented applications. The device is byte controlled.
The flip-flops appear transparent to the data when the
Latch Enable (LE) is HIGH. When LE is LOW, the data that
meets the setup time is latched. Data appears on the bus
when the Output Enable (OE) is LOW. When OE is HIGH,
the outputs are in a high impedance state.
The LVTH32373 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These latches are designed for low-voltage (3.3V) V
applications, but with the capability to provide a TTL inter-
face to a 5V environment. The LVT32373 and LVTH32373
are fabricated with an advanced BiCMOS technology to
achieve high speed operation similar to 5V ABT while
maintaining a low power dissipation.
Ordering Code:
Note 1: BGA package available in Tape and Reel only.
Logic Symbol
Order Number
Package Number
(Preliminary)
(Preliminary)
BGA96A
BGA96A
96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
[TAPE and REEL]
96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
[TAPE and REEL]
DS500548
CC
Features
Input and output interface capability to systems at
5V V
Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs (74LVTH32373),
also available without bushold feature (74LVT32373)
Live insertion/extraction permitted
Power Up/Down high impedance provides glitch-free
bus loading
Outputs source/sink 32 mA/ 64 mA
ESD performance:
Human-body model
Machine model
Charged-device model
Packaged in plastic Fine-Pitch Ball Grid Array (FBGA)
(Preliminary)
CC
Package Description
200V
2000V
1000V
August 2001
Revised August 2001
www.fairchildsemi.com
Preliminary

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74lvth32373gx Summary of contents

Page 1

... BGA96A 96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide (Note 1) (Preliminary) [TAPE and REEL] 74LVTH32373GX BGA96A 96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide (Note 1) (Preliminary) [TAPE and REEL] Note 1: BGA package available in Tape and Reel only. ...

Page 2

Connection Diagram (Top Thru View) Truth Table Inputs – Inputs – ...

Page 3

Logic Diagrams V is associated with Bytes 1 and 2. CC1 V is associated with Bytes 3 and 4. CC2 Note: Please note that these diagrams are provided only for the understanding of logic operations and should not be used ...

Page 4

Absolute Maximum Ratings Symbol Parameter V Supply Voltage Input Voltage Output Voltage Input Diode Current Output Diode Current Output Current Supply Current ...

Page 5

DC Electrical Characteristics Symbol Parameter I Power Supply Current (V CCH I Power Supply Current (V CCL I Power Supply Current (V CCZ I Power Supply Current (V CCZ I Increase in Power Supply Current (V CC (Note 7) Note ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted 96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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