74lvc2g38dp NXP Semiconductors, 74lvc2g38dp Datasheet - Page 7

no-image

74lvc2g38dp

Manufacturer Part Number
74lvc2g38dp
Description
Dual 2-input Nand Gate Open Drain
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
11. Dynamic characteristics
Table 8.
Voltages are referenced to GND (ground 0 V); for test circuit see
[1]
[2]
12. Waveforms
74LVC2G38_5
Product data sheet
Symbol Parameter
t
t
C
PZL
PLZ
Fig 7. Inputs nA and nB to output nY propagation delay times
PD
Typical values are measured at nominal V
C
P
f
f
C
V
N = number of inputs switching;
i
o
(C
D
CC
PD
= input frequency in MHz;
L
= output frequency in MHz;
= output load capacitance in pF;
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in V;
Measurement points are given in
OFF-state to LOW
propagation delay
LOW to OFF-state
propagation delay
power dissipation
capacitance
PD
V
Dynamic characteristics
CC
2
V
CC
f
o
2
) = sum of outputs.
f
i
N + (C
nA, nB input
Conditions
nA, nB to nY; see
nA, nB to nY; see
per gate; V
L
nY output
V
V
V
V
V
V
V
V
V
V
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
V
CC
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 2.7 V
= 3.0 V to 3.6 V
= 4.5 V to 5.5 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 2.7 V
= 3.0 V to 3.6 V
= 4.5 V to 5.5 V
2
Table 9
GND
f
V
CC
V
I
o
CC
= GND to V
) where:
OL
V
and at T
I
Rev. 05 — 4 September 2007
Figure 7
Figure 7
V
amb
t
M
PLZ
CC
= 25 C.
D
in W).
V
X
[2]
Figure
Min
1.2
0.7
0.7
0.7
0.5
1.2
0.7
0.7
0.7
0.5
-
8.
40 C to +85 C
t
PZL
Typ
3.0
1.8
2.5
2.1
1.5
3.0
1.8
2.5
2.1
1.5
5
Dual 2-input NAND gate; open drain
V
[1]
M
mnb132
Max
8.6
4.8
4.4
4.1
3.3
8.6
4.8
4.4
4.1
3.3
-
74LVC2G38
40 C to +125 C Unit
Min
1.2
0.7
0.7
0.7
0.5
1.2
0.7
0.7
0.7
0.5
-
© NXP B.V. 2007. All rights reserved.
Max
10.8
10.8
6.0
5.5
5.2
4.2
6.0
5.5
5.2
4.2
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
pF
7 of 15

Related parts for 74lvc2g38dp